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Seeking a Yield Enhancement Engineer to analyze wafer process data, conduct failure analysis, and drive yield improvement initiatives. Ideal for candidates with relevant educational background and internships.

Seeking a Principal Engineer for Physical Design to implement IC design processes including floor planning, placement optimization, and power integrity analysis, requiring 10+ years of experience in physical design.

The Engineer I will provide technical and test support for cesium and rubidium products, including test procedure development, data analysis, troubleshooting, and managing projects.

The intern will support the Quality team by maintaining documentation, assisting in inspections, and participating in audits to ensure compliance with quality standards.

The Senior Engineer II is responsible for product reliability, qualification tests, and root cause analysis for FPGA products, collaborating across teams to ensure quality and compliance throughout the product lifecycle.

The Product Marketing Manager leads the product lifecycle for MPUs, developing market strategies, overseeing product launches, and engaging with customers to enhance business development.

The Engineering Planner coordinates engineering projects, ensuring material availability, managing inventory, and supporting build plans through collaboration with teams and stakeholders.

The Staff FPGA/SoC Integration Engineer will integrate custom and external IPs into FPGA chips, manage RTL, place/route, and ensure timing closure.

Develop and define verification environments, write plans and documentation, handle verification architecture, and perform both block and chip level verification.

This is a 3.5-year apprenticeship program focusing on the production of SAW filters, covering technical processes, safety, and quality management.