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Develop and own verification for IP features (high-speed serial, AMBA, DSP, video). Build SV/UVM testbenches, write tests, improve coverage, debug DUTs, and collaborate across teams to complete the full verification cycle.

Develop and deliver RTL IP from specification through verification and validation on FPGA platforms. Implement digital logic using Verilog/VHDL, follow FPGA design flows and processes, use synthesis/simulation and lint/CDC tools, work on peripheral and high-speed protocol IP, and complete complex projects with limited oversight.

Design high-bandwidth Ethernet/PCIe switches and ARM/MIPS CPU subsystems. Lead digital ASIC work including architecture, micro-architecture, design specification, RTL coding (SystemVerilog/VHDL), FSM design, lint/CDC, constraints, synthesis, and equivalence checking across multiple clock domains.

Develop and maintain an in-house test automation framework and related infrastructure. Build full-stack tools, APIs, and relational databases; support servers and network hardware; add observability and AI/ML tooling; collaborate with QA teams and follow Agile processes.

Serve as customer-facing applications lead for Single Pair Ethernet products, developing and validating concepts from simulation to prototype. Support compliance/certification, perform signal integrity and EMC testing, use lab measurement equipment, create technical documentation, and collaborate with design, validation, and stakeholders.

Act as customer-facing applications engineer for Single Pair Ethernet products, developing and validating SPE concepts, performing simulation, prototyping, signal-integrity and EMC testing, supporting compliance and certification, creating technical documentation, debugging with lab equipment, and collaborating cross-functionally to deliver robust designs and customer support.

Support characterization, validation, debug, and release of power, analog, and mixed-signal ICs. Perform silicon bring-up, bench and ATE correlation, automate validation tasks, analyze test data, support root-cause and failure analysis, create test documentation, and collaborate with design, test, quality, and manufacturing teams to improve validation and manufacturability.

Collaborate with Global Supplier Operations to harmonize data, tools, and processes. Onboard and train staff, ensure supplier compliance, align procurement with production, support ERP/MRP and BI tools, conduct process audits, and drive continuous improvement to reduce costs and delays.

The Senior Engineer I- Product will develop strategies for new product validation and qualification, collaborate with teams, resolve manufacturing issues, and improve product quality and profitability.

Lead block-level verification: create test plans, develop UVM/SystemVerilog testbenches, integrate with RTL, run regressions, analyze functional/code coverage, and work with design teams to debug and close issues.