Top Tech Jobs & Startup Jobs

Reposted One Month AgoSaved
In-Office
Hauppauge, NY, USA
66K-128K Annually
Senior level
66K-128K Annually
Senior level
Hardware • Semiconductor
Produce, edit, proofread, format, and publish technical documentation to ISO/TS standards. Work with SMEs to translate technical content into customer-focused docs, coordinate reviews, create graphics, and meet project deadlines.
Top Skills: Adobe AcrobatAdobe FramemakerEthernetMS OfficeMicrosoft VisioOxygen Xml AuthorPciePublication ManagerRws Tridion DocsUsb
Reposted One Month AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Entry level
Entry level
Hardware • Semiconductor
The Analyst in Accounting will handle accounts payable, ensure compliance with GST and TDS, prepare returns, support audits, and manage documents.
Top Skills: ExcelGstTds
Reposted One Month AgoSaved
In-Office
San Jose, CA, USA
70K-163K Annually
Senior level
70K-163K Annually
Senior level
Hardware • Semiconductor
The Senior Engineer II is responsible for product reliability, qualification tests, and root cause analysis for FPGA products, collaborating across teams to ensure quality and compliance throughout the product lifecycle.
Top Skills: AteCJavaPerlPythonRtlVerilogVhdlVisual Basics
Reposted One Month AgoSaved
In-Office
Chandler, AZ, USA
Expert/Leader
Expert/Leader
Hardware • Semiconductor
Lead product strategy, requirements, and business planning for automotive wireless SoCs (BLE, UWB, etc.). Drive roadmaps, competitive analysis, standards engagement, cross-functional coordination, customer enablement, and product launches to support vehicle access and digital key applications.
Top Skills: BleBluetooth Low EnergyRf IcRf IpSocSub-GhzSubghzUltra-WidebandUwbWi-Fi
Reposted One Month AgoSaved
In-Office
2 Locations
65K-165K Annually
Senior level
65K-165K Annually
Senior level
Hardware • Semiconductor
Manage a team of Supply Chain Buyers ensuring the flow of materials into Microchip Technology's fabs. Responsibilities include sourcing, contract negotiations, performance evaluation, and coordination of procurement activities.
Top Skills: ExcelMS OfficeOutlookPowerPointWord
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Reposted One Month AgoSaved
In-Office
Chandler, AZ, USA
57K-139K Annually
Senior level
57K-139K Annually
Senior level
Hardware • Semiconductor
Lead and implement physical design tasks for 32-bit microcontroller and wireless products, including floorplanning, placement optimization, clock tree synthesis, routing, timing closure, multi-voltage floorplans, verification-clean designs, flow automation, and vendor/IP interfacing while collaborating with international teams.
Top Skills: Clock Tree SynthesisCrosstalkEmirLogic SynthesisLow Power MethodologiesPhysical DesignPhysical VerificationPlace And RoutePythonRtlTclTiming ClosureVerilogVhdlVlsi
Reposted One Month AgoSaved
In-Office
Burnaby, BC, CAN
86K-186K Annually
Senior level
86K-186K Annually
Senior level
Hardware • Semiconductor
Design, develop, integrate, debug, and verify embedded SoC firmware. Specify firmware features and architecture, collaborate with chip design and validation teams for pre/post-silicon work, troubleshoot with debug tools, author design documentation and user guides, participate in code reviews, and improve development processes.
Top Skills: AgileAnalyzersCCxlDdrFirmware Debug ToolsMipsNvmePcieRaidRiscRtosSASSataSocThreadx
Reposted One Month AgoSaved
In-Office
2 Locations
Senior level
Senior level
Hardware • Semiconductor
Senior technical authority for FPGA/SoC solutions in EMEA. Own complex technical issues end-to-end, develop reference designs, support board-level design and embedded processor integration, and enable FAEs and customers through training, design support, and customer escalations.
Top Skills: Amd Xilinx FpgaArm CortexCDdrIntel Altera FpgaLiberoLogic AnalyzerMicrochip FpgaOscilloscopeQuartusRisc-VSerdesVerilogVhdlVivado
One Month AgoSaved
In-Office
Burnaby, BC, CAN
107K-226K Annually
Expert/Leader
107K-226K Annually
Expert/Leader
Hardware • Semiconductor
Design and own IO/pad ring and bump pattern planning for SoC storage and memory controllers. Produce physical-design handoff deliverables, ensure compliance with package constraints, collaborate across architecture, IP, implementation, foundry, and support verification, emulation, validation, and silicon debug.
Top Skills: Boundary Scan (Ieee 1149.1)CxlDdrIspJIRAJtagLefLibertyOrbit IoPciePythonRtlSerdesSvnSystemverilogTclVerilog
Reposted One Month AgoSaved
In-Office
Penang, Daerah Timor Laut, Penang, MYS
Senior level
Senior level
Hardware • Semiconductor
The Principal Engineer will lead physical design projects, develop methodologies for layout and verification, strategize floor planning, and mentor junior engineers while ensuring design goals are met.
Top Skills: Cadence InnovusCadence PvsLinuxPerlSynopsys IccTclUnixVerilogVhdl
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