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Reposted One Month AgoSaved
In-Office
Irvine, CA, USA
160K-225K Annually
Senior level
160K-225K Annually
Senior level
Aerospace • Other
Develop and execute full-chip physical verification for advanced SoCs, optimizing verification flows, resolving design rule violations, and engaging with foundry teams.
Top Skills: AsicCalibreDrcEsdIcvLvsPegasus
Reposted One Month AgoSaved
In-Office
Palo Alto, CA, USA
175K-280K Annually
Senior level
175K-280K Annually
Senior level
Aerospace • Other
Lead complex silicon projects from kickoff through production for space and ground ASICs. Track schedules, coordinate cross-disciplinary teams, manage suppliers and vendors, drive bring-up, resolve technical issues, and ensure qualification and ramp to mass production.
Top Skills: Advanced Node FabsAnalog Rf AsicAsicAteConfluenceDiagnostic ScriptsDigital AsicEda ToolsEmulationExternal IpFpgaJIRAOsatPackage SubstratePcb Schematics And LayoutSilicon DriversSmartsheet
Reposted One Month AgoSaved
In-Office
Hawthorne, CA, USA
100K-140K Annually
Junior
100K-140K Annually
Junior
Aerospace • Other
Design and develop turbopumps for rocket engines. Responsibilities include hydrodynamic analysis, collaboration with teams, and testing support.
Top Skills: AnsysSiemens Nx
Reposted One Month AgoSaved
In-Office
Irvine, CA, USA
Senior level
Senior level
Aerospace • Other
Design, simulate, and characterize RF/analog/mixed-signal ICs for space and ground systems. Derive specs, perform floorplanning and layout, model package parasitics, validate prototypes, analyze radio performance, and support test automation and production qualification.
Top Skills: AdsApskCmosFilterHfssK-BandKa-BandKu-BandLow Noise AmplifierMicrowave FrequenciesMixerMomentumNetwork AnalyzerPllPower AmplifierQamQpskRf Transceiver ArchitectureSigeSpectreSpectrum AnalyzerSpread SpectrumVector ModulatorVector Signal AnalyzerVector Signal Generator
Reposted One Month AgoSaved
In-Office
Palo Alto, CA, USA
Senior level
Senior level
Aerospace • Other
Lead IC layout work for RF and mixed-signal chips, defining floorplans, power/ground distribution and pad placement. Perform block and top-level layout, DRC/ERC/LVS checks, tape-out steps, and collaborate with packaging, EDA vendors, and cross-disciplinary teams. Mentor peers by generating layout guides and drive manufacturability and foundry handoff for advanced-node silicon targeting high-frequency RF blocks.
Top Skills: 16Nm22Nm5Nm7NmDesign Rule Checking (Drc)Electrical Rule Checking (Erc)Esd StructuresGds/GdsiiLayout Vs Schematic (Lvs)LinuxMixed-SignalPerlPythonRevision Control SystemsRficShell ScriptingSkill
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Reposted One Month AgoSaved
In-Office
Irvine, CA, USA
Junior
Junior
Aerospace • Other
Lead IC layout discipline for custom RF and analog blocks: floorplanning, power/ground distribution, pad placement, block layout with attention to matching and parasitics, verification (DRC/ERC/LVS), top-level integration, GDS generation and manufacturability checks, tool trials, and documentation.
Top Skills: DrcEda ToolsErcGdsiiLinuxLvsPerlPythonRevision Control SystemsShell ScriptingSkill (Cadence Skill)
Reposted One Month AgoSaved
In-Office
Redmond, WA, USA
Junior
Junior
Aerospace • Other
Design, simulate, and model RF/analog/mixed-signal ICs in SiGe or CMOS for space and ground applications. Derive specs, perform floorplanning and layout, model packages/parasitics, evaluate prototypes, characterize radio performance, develop test lab equipment, and collaborate with systems, DSP, ASIC, and manufacturing teams on production testing and qualification.
Top Skills: AdsCmosHfssK-BandKa-BandKu-BandLow Noise AmplifiersMixersMomentumNetwork AnalyzerOscillatorsPhase-Locked LoopsPower AmplifiersRf Transceiver ArchitecturesSigeSpectreSpectrum AnalyzerVector ModulatorsVector Signal AnalyzerVector Signal Generator
Reposted One Month AgoSaved
In-Office
Hawthorne, CA, USA
165K-230K Annually
Senior level
165K-230K Annually
Senior level
Aerospace • Other
Design, implement, test, and support software and firmware for processors and microcontrollers used in avionics. Validate and bring up flight devices, troubleshoot hardware/software integration, analyze test results, and support launch operations while collaborating across multidisciplinary teams.
Top Skills: CC++
Reposted One Month AgoSaved
In-Office
Bastrop, TX, USA
Junior
Junior
Aerospace • Other
Design, analyze, test, and deliver high-reliability mechanical hardware for a large satellite constellation. Own product lifecycle from concept through high-volume production and on-orbit operation, drive DFM, perform environmental testing, and collaborate on system-level requirements and optimization.
Top Skills: CadFeaGd&TNx
Reposted One Month AgoSaved
In-Office
Redmond, WA, USA
Senior level
Senior level
Aerospace • Other
Design, simulate and model RF/analog/mixed-signal ICs in SiGe or CMOS; derive RFIC specifications; perform floorplanning, layout, and parasitic/package modeling; evaluate and characterize prototypes and full radio performance; develop automated test lab equipment; and work with systems, modem/DSP, ASIC, and manufacturing teams for production testing and qualification.
Top Skills: AdsCmosHfssMomentumNetwork AnalyzerSigeSpectreSpectrum AnalyzerVector Signal AnalyzerVector Signal Generator
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