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Lead and develop the Raptor supply base for machined and metallic components, driving supplier development, cost reduction, contract negotiation, capacity planning, and risk mitigation from NPI through high-volume production while presenting status and strategy to senior leadership.

Lead international government stakeholder engagement and capture efforts to grow Starshield SATCOM and space sensing programs. Develop sales strategy, manage pipeline and forecasts, produce market and funding analyses, support complex proposal development, coordinate cross-functional teams, and refine engagement roadmaps. Requires export-control familiarity and opportunity analysis tailored to allied international government customers.

Perform root cause and failure investigations for Starshield production hardware, contain and drive corrective actions for non-conforming product, improve manufacturing/test processes and yield using data-driven methods, support PFMEA and continuous improvement, document findings, and collaborate with cross-functional teams to enhance hardware reliability and production robustness.

Investigate and resolve hardware failures for Starshield satellite production, drive root-cause analysis and corrective actions, improve manufacturing/test processes, apply SPC/DOE and PFMEA, support shop-floor continuous improvement and documentation to maximize yield and prevent escapes.

The Motion Graphics Producer will lead the creation of 2D animation projects, ensure quality and accuracy, manage resources, and collaborate across teams to deliver engaging content.

Build and maintain talent pipelines for hard-to-fill engineering, manufacturing, and operations roles. Proactively source passive candidates via LinkedIn, X, GitHub, Boolean search and niche forums; leverage AI and ATS tools; conduct outreach and initial phone screens; track sourcing metrics; partner with recruiters and hiring managers; represent SpaceX and monitor market trends.

Design and deliver kV-level DC-DC power supplies for TWTA systems across concept, prototyping, testing, integration, and production. Lead trade studies, verification testing, magnetics design, control design, and cross-disciplinary collaboration to optimize performance, efficiency, and reliability in harsh environments.

Lead design-for-test (DFT) architecture and implementation for ASICs using Siemens Tessent, ATPG and BIST methodologies. Own pattern generation, scan insertion, hierarchical test flows, and post-silicon validation. Integrate and verify DFT IP, run SDF-annotated gate-level simulations, and develop automation scripts in Perl/Python/Tcl/C+.

Lead development and optimization of DFT architectures for ASICs using Tessent and ATPG methodologies. Own scan insertion, compression, memory/logic BIST, hierarchical test flows, gate-level simulation debugging, post-silicon validation, and DFT IP integration. Automate test processes and analyze data with scripting languages. Support design readiness checks and collaborate across systems, firmware, architecture, and validation teams toward tapeout and product deployment.

Lead DFT architecture implementation and optimization for space-grade ASICs, including scan insertion, BIST, ATPG pattern generation, and post-silicon validation. Integrate and verify DFT IP across subsystems, run and debug SDF-annotated gate-level simulations, automate test flows with scripting, and support tapeout readiness and production test integration.