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The role involves supporting sales by providing opportunity solution pricing, developing technical solutions, and collaborating with sales teams to meet customer requirements.

Lead test strategy and execution for complex networking features. Design and maintain Python-based test frameworks and CI/CD automation. Use AI/LLMs for test generation and log analysis. Execute functional, performance, interoperability, regression, reliability, and security testing across physical and virtual testbeds. Capture packet traces and logs, perform RCA, and mentor junior engineers while building scalable test infrastructure.

Own and shape the long-term supplier relationship with Marvell. Define multi-year business strategies, lead cross-functional teams, perform data-driven financial and market analysis, develop recommendations for senior leadership, and align strategy across product, engineering, quality, finance, and procurement.

The Senior Program Manager oversees internal projects, manages multi-functional teams, ensures budget compliance, and advises on strategic direction and project execution.

The AI Tools Architect/Tech Lead role involves designing AI personas, maintaining AI configuration artifacts, and leading impactful engineering teams. The candidate will innovate with AI coding tools, evaluate code review agents, and drive organizational change through documentation and collaboration across teams.

This role requires driving sales pipelines, providing expert guidance, maintaining client relationships, and collaborating with account managers to achieve sales targets. Leadership in consultative selling and extensive industry knowledge is essential.

The Master Compliance Engineer ensures compliance with EMC and energy efficiency regulations, leading testing and design efforts in an ISO 17025 environment, and mentoring junior engineers.

Serve as Level 3 escalation for HPE Instant On networking: perform deep troubleshooting, root-cause analysis, packet capture and log analysis, reproduce issues in lab, validate fixes, collaborate with engineering/product teams, mentor L1/L2, produce documentation, and support high-visibility customer engagements and POCs.

Design/Verification engineer will develop AIML-enhanced verification methodologies, build and maintain UVM testbenches, drive coverage-driven verification closure, automate RTL generation from specs, evaluate industry tools, perform root-cause analysis, and collaborate with design and system teams to ensure silicon quality from RTL to tapeout.

Responsible for technical consulting and support for customers in Germany, involving solution design, customer interaction, and team training.