Top Tech Jobs & Startup Jobs

Lead yield and product lifecycle activities for optical semiconductor transceivers: collaborate with foundries, DFT and test teams; analyze ATE/WAT data; optimize test flows and process corners; own yield roadmaps and cost analysis; engage suppliers and contract manufacturers; establish manufacturing metrics; drive NPI-to-production yield characterization and continuous improvement.

Lead architecture, design, and development of BIOS, BSP, diagnostics, and kernel/user-space device drivers for FPGA and networking peripherals. Perform Linux hardware bring-up, write and execute software test plans, debug prototypes with cross-functional teams, and lead technical reviews for core and edge routing products.

Architect and develop BIOS, BSP, device drivers, and diagnostics for core and edge routing products. Design, implement, and test embedded software for FPGA and networking peripherals, lead Linux hardware bring-up, and validate systems using protocols like I2C, SPI, UART, PCIe, and GPIO. Collaborate cross-functionally to debug prototypes, execute test plans, and mentor teams while driving technology direction and long-term product impact.

12-month Cisco Sales Associates Program (CSAP) trains recent graduates in technical sales across Collaboration, Security, Networking, Cloud and AI. Participants complete immersive bootcamp, three rotations, mentor support, AI-driven simulations, and earn industry certifications, progressing into Inside Account Executive roles to partner with Solutions Engineers and drive customer outcomes.

12-month graduate accelerator to develop technical sales skills across Collaboration, Security, Networking, and Cloud. Includes immersive bootcamp, three rotations, AI-first training, mentor support, certification, and progression into Solutions Engineer roles within Global Virtual Engineering.

Lead architecture, design, and implementation of BIOS, BSP, kernel and user-space device drivers and diagnostics for high-bandwidth Cisco routing and embedded platforms. Drive Linux hardware bring-up, board validation, debugging, and test planning while collaborating across teams, mentoring engineers, and delivering production-ready software.

Senior software engineer on Cisco's Supply Chain Plan IT team designing, developing, troubleshooting, and releasing features. Collaborates with cross-functional teams, mentors peers, applies SDLC and Agile practices, and uses GenAI to accelerate development.

Lead architecture, design, and verification of high-performance ASIC analog and mixed-signal subsystems. Define verification strategies, collaborate with cross-functional teams on packaging and hardware requirements, optimize power/performance/area, develop reusable methodologies and physical design functions, and guide advanced digital design flows for high-volume ASIC releases.

Develop and evolve IOS-XR programmability stack (gRPC, NETCONF) for scalable network automation. Design, implement, and optimize model-driven APIs, improve memory and performance, and deliver modular, testable embedded C/Python code for service provider and hyperscaler devices.

Architect, design, and develop BIOS, BSP, diagnostics, and kernel/user-space device drivers for FPGA and networking peripherals. Lead Linux hardware bring-up, board validation, and debugging. Create and execute software test plans, troubleshoot kernel modules through applications, and collaborate cross-functionally. Lead technical reviews and mentor engineers while delivering large-scale, high-bandwidth embedded systems.