Top Tech Jobs & Startup Jobs

Lead DFT insertion and ATPG for ASIC designs, perform post-silicon bring-up and ATE test program debug, script and automate DFT/ATPG flows, interface with physical design and RTL teams, and support synthesis through place-and-route timing closure and tape-out signoff.

Design and deploy chip, module, and system-level DFT solutions for a photonics-based AI platform. Develop and automate DFT methodologies (ATPG, MBIST, boundary-scan), integrate with RTL and physical design, validate pre-silicon implementations, support post-silicon bring-up and debug, and scale test flows for production.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.

Lead system-level electrical design and integration for silicon photonics AI accelerators. Define hardware requirements, design power/memory/interconnect circuits, oversee PCB layout and manufacturability, validate and qualify electrical properties, perform lab validation, and collaborate with mechanical, IC, software, and manufacturing teams to bring products from concept to production.

Research and model performance of Lightmatter-enabled hardware systems for ML training and inference. Build performance modeling tools, design rack-scale reference platforms, collaborate with product and engineering, publish academic and industry research, and act as the in-house ML systems expert.

The Staff Physical Design Engineer will implement digital blocks using advanced tech nodes, focusing on timing closure and power integrity, while collaborating with teams on ASIC design.

Implement and sign off complex digital blocks from synthesis through physical verification in advanced process nodes. Drive full-chip STA and timing closure, power analysis, floorplanning, IO and clock distribution, DRC/LVS cleanup, and functional/timing ECOs. Automate flows with TCL/Python/Shell, collaborate across teams, and work with EDA vendors to resolve tool issues.

Lead implementation of complex digital blocks from synthesis through physical verification on advanced nodes (3nm). Drive timing closure, power and EM/IR analysis, full-chip floorplanning, IO and clock distribution, DRC/LVS cleanup, ECOs, and collaborate with EDA vendors. Automate and customize flows using Tcl/Python/Shell; support tape-out and photonics integration.

The Photonics Technical Lead will create scalable laser solutions for silicon photonics AI communications, collaborating across teams to ensure design feasibility and meet performance specifications.

The Staff Electrical Test Engineer will develop and implement ATE test solutions for Silicon Photonics products, support manufacturing testing, collaborate with teams to debug failures, and enhance testing productivity with scripting.