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Provides technical leadership for hardware systems developing silicon photonics-based AI accelerators and interconnect platforms. Owns multiple hardware projects from concept through production, including PCBA definition, system integration, verification, validation, documentation, and production release. Collaborates across electrical, mechanical, packaging, firmware, photonics, software, and IC engineering teams while mentoring engineers and driving technology roadmaps. Requires deep expertise in VRMs, high-speed SerDes, and major hardware interfaces.

Own end-to-end simulation, co-design, and laboratory verification of photonic-electronic links. Develop multi-physics optical and analog models, perform corner, Monte Carlo, and PVT analyses, create link budgets, and correlate simulations with silicon measurements. Partner with photonic and analog circuit teams on architecture, specifications, interface requirements, and corrective design actions. The role requires high-speed optical lab expertise, silicon photonics experience, and proficiency in photonic, mixed-signal, and Python-based simulation workflows.

Owns major enterprise customer accounts and drives the full sales cycle from engagement through deal closure. Responsibilities include developing account strategies, expanding revenue, building executive and technical relationships, positioning complex photonics and data center solutions, forecasting pipeline, leading negotiations, and coordinating cross-functional teams to deliver customer success.

The Staff Mechanical Engineer will focus on mechanical design, structural analysis, GD&T, and FEA to enhance packaging technologies for AI architectures at Lightmatter.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact behavioral models, automate parameter extraction from FDTD/FEM solvers, correlate models with lab measurements, implement CI/regression tests, and own netlist extraction and connectivity logic for circuit-level simulation.

Lead development of the internal photonics PDK: create Python-based pcells, build and verify compact models for active/passive devices, automate parameter extraction from FDTD/FEM solvers, validate models against lab measurements, implement CI/regression testing, and own netlist extraction and connectivity logic to ensure accurate system-level simulation.

The Physical Design Timing Engineer will drive backend digital execution, focusing on timing constraints, analysis, and closure on advanced CMOS technologies. Responsibilities include STA sign-off, collaborating with multiple teams, managing timing complexities, and automating timing ECO generation.

Lead development of the internal photonics PDK and component library. Build Python-based pcells, create and validate compact models for active and passive devices, automate parameter extraction from electromagnetic solvers, and correlate models with lab measurements. Implement regression testing, CI pipelines, and robust netlist/connectivity logic to ensure layout, models, and simulations remain synchronized.

Responsible for timing constraints development, STA and timing closure on CMOS technologies, driving timing sign-off, analyzing power/performance tradeoffs, and running full-chip STA.

Design and analyze power delivery networks for high-performance compute SoCs across package and system architectures. Perform electromagnetic, time-domain, and frequency-domain simulations; model regulators; evaluate voltage droop and overshoot; conduct lab measurements; and collaborate with hardware, layout, and systems teams to improve power integrity. Document analyses, support design reviews, monitor layout constraints, and contribute to architectural tradeoff studies.