Design and implement low-latency FPGA logic for realtime image processing in head-mounted and vehicle systems. Translate specs into SystemVerilog/VHDL, build testbenches, achieve timing closure, optimize latency across clock domains, and perform hardware bring-up and debugging with board and embedded software teams.

Own architecture and implementation of the XR compositor and OpenXR runtime, define graphics and IPC frameworks, ensure multi-process reliability, extend automated tests, drive product definition, and mentor engineers on cross-stack runtime and platform integration.

Lead and establish quality engineering for Distance Runtime: define test strategy, implement automation and CI coverage, run visual regression and manual validation on reference hardware, own release QA and go/no-go decisions, define defect workflows and quality gates, and grow a QA team collaborating closely with runtime, tracking, platform, Safety and Security.