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Manage complex executive calendars, coordinate travel, handle communications, oversee daily office logistics, and support technology needs.

The role involves verifying mixed-signal and digital systems, creating RNMs, ensuring interface clarity, and contributing to methodologies across teams.

The Senior Test Engineer will drive production test strategy for AI silicon, focusing on Wafer Sort, Final Package Test, and yield analysis. Responsibilities include developing test programs, collaborating with cross-functional teams, and optimizing test methodologies, ensuring robust manufacturing readiness and quality of silicon products.

The Senior Systems Integration Engineer will lead silicon bring-up, debugging, validation, and system characterization, ensuring stable and high-performing hardware platforms across multiple domains.

The role involves optimizing analog-aware software for neural networks, designing algorithms, improving software quality, and collaborating on hardware validation. Requires experience with complex algorithms and communication skills.

Develop and maintain emulation platforms for AI-centric SoCs, integrate RTL, support firmware bring-up, debug co-design issues, and analyze AI workload performance.

The role involves ownership of physical design processes, collaboration in various design areas, mentoring, and optimizing performance, power, and area in advanced nodes.

Seeking a Senior Analog Mixed-Signal Design Engineer to work on complex systems, involving low-level SPICE simulations and algorithm development in Python and SystemVerilog. Responsibilities include modeling circuits, tracking specifications, and collaborating across teams.

The Compiler Engineer will design compiler IRs and strategies for complex algorithmic workloads, collaborating with hardware engineers to enhance ISA and execution models, ensuring performance and correctness, while simplifying developer experiences.

Lead DFT implementation and verification for ASIC/SoC designs, focusing on methodologies like MBIST, IJTAG, Scan, and ATPG while collaborating with cross-functional teams.