Top Tech Jobs & Startup Jobs

Owns assigned image sensor and ASIC products, contributes to product definition and DFM, leads product introduction and ramp-up, analyzes yield, drives corrective actions, finalizes datasheets through characterization, and collaborates with test engineers to develop, verify, and release wafer probe and final test programs.

Designs, simulates, verifies, debugs, and characterizes analog and mixed-signal circuits for high-speed interfaces, SerDes, PLLs, CDRs, FIFOs, and clock systems. Collaborates with system and test engineers on image sensor and bridge chip products. Performs high-speed testing with oscilloscopes and BERT, supports layout optimization, verifies analog-digital interfaces, and documents IP and design specifications.

Develops next-generation CMOS image sensors through analog system architecture, block and transistor-level circuit design, simulation, verification, silicon bring-up, debugging, optimization, and production support. Collaborates with digital, layout, process, and evaluation engineers from concept through mass production. Conducts advanced circuit R&D, provides technical leadership, and mentors less experienced engineers. The role requires strong analog design experience, communication skills, and business proficiency in Japanese and English.

Designs metasurfaces and diffractive optical structures to manipulate light and improve image sensor performance. Troubleshoots optical issues, develops solutions, performs FDTD simulations and optimization, and analyzes optical and image data using tools such as MATLAB, Python, and Excel. Requires advanced education in optics, physics, electrical engineering, or a related field, along with strong teamwork and communication skills.

Characterization Interns test, analyze, debug, and optimize CMOS image sensors throughout chip development. Responsibilities include sensor evaluation under varied operating conditions, data-driven performance analysis, test setup and automation exposure, pre-silicon verification support, post-silicon bring-up, and documenting technical findings. The role collaborates with analog and digital design teams in an automotive semiconductor R&D environment.

Designs, simulates, verifies, debugs, and characterizes embedded analog and mixed-signal circuits for high-speed interfaces, including SerDes, PLLs, CDRs, and clock systems. Collaborates with system and test engineers on package, board, and system-clock development. Performs high-speed testing with oscilloscopes and BERTs, supports analog/digital interface verification, contributes to layout optimization, and documents IP and design specifications.

Implements ISP algorithms in hardware using Verilog, SystemVerilog, or SystemC. Verifies logic at ISP and digital-system levels, optimizes designs for gate count and power consumption, and collaborates with ISP algorithm teams. Requires an engineering degree, RTL and verification knowledge, C/C++ programming experience, strong debugging skills, communication abilities, adaptability, and results orientation. SystemC with high-level synthesis experience and CMOS image sensor knowledge are preferred.

Develop and enhance toolchain features for neural processing unit architectures, enabling customers and partners to optimize and port AI models. Responsibilities include compiler development, code generation, program analysis, pipeline optimization, model-layer modification, automation, debugging, collaboration with inference and application engineering teams, and customer support.

Design and implement analog and mixed-signal circuits for image sensors, including pixel-array readouts, amplifiers, ADCs, and low-noise regulators. Perform transistor-level design, layout, physical verification, simulation, and system-level analysis using CAD tools. Debug, characterize, and optimize fabricated sensor chips, improve design methodologies, develop automotive reliability and safety solutions, and mentor junior engineers.

Leads chip-top and block layout development from specification through verification and production support. Defines development plans, performs hands-on analog layout and verification, provides technical leadership, and expands the analog layout team. Improves layout quality, efficiency, and development processes while collaborating across disciplines. Requires analog layout experience, chip-top technical leadership, strong communication, and an engineering or related degree. People management and CMOS image sensor experience are preferred.