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Reposted 8 Hours AgoSaved
In-Office
London, Greater London, England, GBR
163K-163K Annually
Senior level
163K-163K Annually
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
As a Staff Engineer for Hardware Integration, you will lead technical direction and ownership of hardware-software integration within the OTPU stack, guiding complex engineering problems through the full lifecycle from pre-silicon to production reliability.
Top Skills: Asic ValidationBmc PlatformsFirmware ArchitectureHigh-Speed Interconnect Fabrics
Reposted 8 Hours AgoSaved
In-Office
Bristol, England, GBR
220K-220K Annually
Senior level
220K-220K Annually
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
Lead end-to-end functional verification of digital subsystems for high-speed mixed-signal ASICs, ensuring quality and schedule adherence while managing a team of engineers.
Top Skills: Eda ToolsSystemverilogUvm
Reposted 8 Hours AgoSaved
In-Office
Austin, TX, USA
388K-388K Annually
Senior level
388K-388K Annually
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
Lead functional verification of digital subsystems for high-speed mixed-signal ASICs, ensuring quality and rapid execution while mentoring a team of engineers.
Top Skills: Ams Co-SimulationSystemverilogUvm
Reposted 8 Hours AgoSaved
In-Office
London, Greater London, England, GBR
Mid level
Mid level
Artificial Intelligence • Semiconductor • Manufacturing
As a People Partner at OLIX, you will support HR operations, guide managers on HR matters, ensure compliance with employment law, handle employee relations, and contribute to building a high-performance culture.
Top Skills: Data AnalyticsEmployment LawHr PracticesPerformance Culture
Reposted 9 Days AgoSaved
In-Office
London, Greater London, England, GBR
98K-98K Annually
Mid level
98K-98K Annually
Mid level
Artificial Intelligence • Semiconductor • Manufacturing
The Legal Counsel will manage commercial contracting, lead negotiations, create playbooks, integrate AI, and collaborate with various departments.
Top Skills: Ai ToolsClmLegal Ai ToolingN8NPythonSQLZapier
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20 Days AgoSaved
In-Office
London, Greater London, England, GBR
121K-121K Annually
Senior level
121K-121K Annually
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
The Optical Interconnect Process Engineer is responsible for designing, optimizing, and manufacturing optical interconnect systems, ensuring high performance and reliability through process development and yield analysis.
Top Skills: AldDrieFemInterferometryJmpL-I-VPhotolithographyProfilometryPvdPythonRieSpectral TestingThin-Film DepositionWafer BondingWet Etch
20 Days AgoSaved
In-Office
London, Greater London, England, GBR
Senior level
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
The Optical Interconnect Process Engineer will design optical interconnects, drive co-packaged optics integration, develop assembly processes, and ensure yield and reliability for optical systems.
Top Skills: Fiber OpticsOptical PackagingOpticsPhotonicsPolymer Optical WaveguidesWaveguides
Reposted 21 Days AgoSaved
In-Office
London, Greater London, England, GBR
195K-195K Annually
Expert/Leader
195K-195K Annually
Expert/Leader
Artificial Intelligence • Semiconductor • Manufacturing
As Software Architect, you will shape OLIX's technical vision in hyperscale AI infrastructure, define architectural standards, and mentor senior engineers across the organization.
Top Skills: Cluster OrchestrationDistributed SystemsFleet OperationsNetworking
22 Days AgoSaved
In-Office
Bristol, England, GBR
Senior level
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
The role involves designing, implementing, and verifying DFT strategies for digital pipelines, collaborating across teams, and mentoring junior engineers.
Top Skills: Design-For-Test (Dft)PythonSystemverilogTclVerilogVhdl
22 Days AgoSaved
In-Office
Austin, TX, USA
365K-365K Annually
Senior level
365K-365K Annually
Senior level
Artificial Intelligence • Semiconductor • Manufacturing
Responsible for managing layout engineering for next-gen accelerator silicon including full-custom analog ML layouts, floor-planning, and integration, while ensuring high-performance outputs.
Top Skills: Cadence VirtuosoPythonSkillTcl
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