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Own complex ASIC and SoC physical implementation from synthesized netlist through signoff, including floorplanning, placement, CTS, routing, timing closure, ECOs, physical verification, and power integrity. Lead cross-functional timing and implementation convergence, develop automation and methodologies, resolve advanced-node challenges, and provide technical mentorship. Partner with RTL, architecture, DFT, verification, package, and SI/PI teams while driving PPA, runtime, quality, and tapeout readiness.

Build and maintain automated testing frameworks for distributed AI training and inference workloads. Develop end-to-end integration and stress-testing plans covering distributed systems, GPU kernels, AI frameworks, and hardware-software boundaries. Collaborate with systems engineers to troubleshoot failures in large-scale clusters, using telemetry and profiling tools to identify root causes and performance bottlenecks. The role also supports containerized test environments and CI/CD workflows.

Build and maintain automated testing frameworks for distributed AI training and inference workloads. Develop end-to-end integration and stress-testing plans, validate GPU and hardware-software interactions, and troubleshoot failures in large-scale distributed clusters. Collaborate with systems engineers using telemetry and profiling tools to identify root causes and performance bottlenecks. The role requires Python automation, test framework development, containerization, and CI/CD experience, with Kubernetes, infrastructure automation, networking, and firmware testing experience preferred.

Lead architecture and delivery of advanced multi-die IC packages for high-performance AI accelerators. Select package types, define substrate stack-ups, bump/ball maps, interposer and mechanical constraints. Design routing, signal escaping, and power distribution; collaborate with IC, SI/PI, physical design and board teams. Manage subcontractors and engage TSMC/OSAT, evaluate emerging packaging technologies, and support package bring-up, failure analysis, debug, and qualification.

As a System Software Engineer, you will design communication primitives for AI models, optimize performance for training workloads, and benchmark performance on clusters.

Delos is a stealth-mode startup seeking to build foundational technology for AI data centers, fostering a collaborative and responsible working environment.

Seeking an experienced DFT Verification Engineer to ensure ASIC DFT logic correctness, building robust verification environments, and collaborating with design engineers on high-quality silicon delivery.

The System Software Engineer will design and implement communication and execution layers for AI models across GPUs, addressing performance issues in distributed training and inference tasks.

Lead design, implementation, and lab validation of high-current power delivery systems for AI compute hardware. Responsibilities include schematic design, component selection, PDN placement and routing, VRM and transient testing, collaboration with SI/PI and package teams, and developing design guidelines and validation plans to ensure stable power under dynamic AI workloads.