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Reposted 24 Days AgoSaved
In-Office
Saratoga, CA, USA
180K-250K Annually
Senior level
180K-250K Annually
Senior level
Artificial Intelligence • Hardware
The role involves post-silicon bring-up, debugging, and validation of ASICs, focusing on diagnostic infrastructures and automation frameworks.
Top Skills: C/C++EthernetPciePythonSerdesUcie
Reposted 24 Days AgoSaved
In-Office
Bangalore, Bengaluru Urban, Karnataka, IND
Senior level
Senior level
Artificial Intelligence • Hardware
The Technical Leader for Network SDK QA will manage the quality and reliability of the platform software, defining QA strategy, designing test frameworks, and mentoring QA engineers. Responsibilities include leading testing processes, collaborating cross-functionally, and driving automation coverage.
Top Skills: C/C++DpdkGitlab CiJenkinsLinuxNetwork Operating SystemsP4PythonSai
Reposted 24 Days AgoSaved
In-Office
Saratoga, CA, USA
250K-280K Annually
Senior level
250K-280K Annually
Senior level
Artificial Intelligence • Hardware
Lead ASIC chip design from micro-architecture to full-chip integration, emphasizing RTL development, verification collaboration, and timing closure.
Top Skills: SystemverilogVerilog
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