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Responsible for IP and chip-level verification planning and execution: compose verification plans, build testbenches, run simulations, debug failures, write functional coverage and SVA, and collaborate with design to achieve silicon sign-off.

Lead front-end SoC/MCU design work from specification through design, verification, and implementation. Own RTL, IP integration, verification planning/execution, FPGA platforms, and support implementation on power/timing issues. Collaborate with software teams and contribute to ATE test, qualification, and production readiness within a small ASIC team.

Work on full digital physical-design flow from RTL to GDS: timing constraints, UPF, synthesis, P&R, CTS, STA, formal and physical verification, ECOs, floorplanning and power integrity to achieve performance, power, and area targets and support tapeout and silicon sign-off.

Design, implement, and verify DFT solutions for Raspberry Pi ASICs. Define DFT strategies at chip, subsystem, and IP level, insert and verify MBIST/ATPG/scan structures using Tessent, support implementation and sign-off, debug timing/power/equivalence issues, and mentor team members.

The Applications Engineer will support industrial customers in integrating Raspberry Pi technology, addressing technical challenges, and providing hands-on assistance throughout the product lifecycle.