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As Principal Mechanisms Engineer, you will design and test coarse pointing assemblies for large aperture optical payloads, ensuring high-performance satellite systems through collaboration and innovative manufacturing processes.

The Principal Optical Systems Engineer will design and manage the life cycle of optical systems for satellites, involving manufacturing, testing, and deployment. Responsibilities include system architecture, optical design, vendor leadership, and team mentorship.

Lead technical procurement and supplier management for mechanical and structural assemblies (motors, bearings, encoders, adhesives). Manage BOMs, develop material planning and supply chain processes, create tools for quality and inventory controls, coordinate clears-to-build with engineering, and run supplier development and reviews from NPI through production.

Build and maintain ground software used to build, test, and operate K2 satellites and customer payloads. Develop backend and frontend features (Rust, TypeScript/Vue), implement mission automation, collaborate with Mission Operations and Flight Software, support on-call operations, and mentor engineers.

Lead month-end close and related accounting processes (fixed assets, inventory, revenue & receivables). Prepare journal entries, accruals, and reconciliations; enhance internal controls and chart of accounts; support ERP implementations and UAT; work cross-functionally; liaise with auditors and tax preparers; identify process improvements to ensure accurate, timely financial statements.

Design, implement, and own reliable data solutions across design, manufacturing, and mission operations. Lead data architecture, migrations, ETL/replication, schema design, and optimizations. Partner with cross-functional teams, drive tradeoffs, prioritize work using data, mentor team members, and deliver production-ready data products.

The Senior Development Test Engineer will oversee component and system level testing of mechanical and electromechanical systems, lead test campaigns, and mentor team members while ensuring safety and reliability in test execution.

Lead bring-up, deployment, and optimization of full-chip and system-level emulation platforms. Build models, transactors, and BFMs; optimize emulation performance; enable HW/SW co-development; support DV, firmware, silicon bring-up, and cross-functional debug; maintain automation and CI for regression and compile flows.

Lead build, integration, and optimization of full-chip and system-level ASIC emulation platforms. Enable HW/SW co‑development, debug emulation failures, automate compile/regression flows, support silicon bring-up, and collaborate with RTL, DV, firmware, physical design, and validation teams to accelerate verification and system validation.

Serve as primary technical interface for commercial payload integration across proposal, design, build, integration, test, launch, and on-orbit phases. Define and negotiate mechanical, electrical, software, power, and mission interfaces; develop interface control documentation and verification plans; coordinate cross-functional teams and represent K2 in customer design reviews and verification milestones.