Top Tech Jobs & Startup Jobs

Designs, develops, deploys, and supports Boomi integration processes connecting ERP, supply chain, B2B, Windchill, and Datalake systems. Collaborates with stakeholders and technical teams to gather requirements, maintain RosettaNet and EDI integrations, troubleshoot workflows, and ensure performance, scalability, and security. Documents solutions, participates in code reviews, resolves issues, and provides technical guidance to junior team members.

Develop and maintain C++ and Python software models representing FPGA devices within Quartus Prime. Build high-performance APIs supporting synthesis, placement, routing, timing, and power analysis. Collaborate across hardware and software teams to integrate next-generation FPGA devices and create tools for FPGA device bring-up. The role requires strong software engineering, algorithms, data structures, communication, and experience with EDA or FPGA tools is preferred.

Develop production agentic AI systems using LLMs, tools, APIs, RAG pipelines, and multi-step reasoning workflows. Build reusable components for context management, tool integration, and knowledge retrieval. Evaluate model accuracy, latency, and cost while collaborating with FPGA and ASIC teams on hardware-aware AI optimization across CPU, GPU, and FPGA platforms.

Designs FPGA boards and development kits, creates board design guidelines and collateral, collaborates with cross-functional engineering teams on rollout plans, represents customer needs in product improvements, and provides technical support for board design issues. The role requires extensive semiconductor and FPGA board design experience, familiarity with FPGA interfaces and EDA tools, and strong communication and customer-engagement skills.

Leads end-to-end design and development of complex processor-, FPGA-, and ASIC-based hardware platforms. Translates system requirements into circuit specifications, schematics, PCB layouts, and design packages. Reviews high-speed routing, signal and power integrity, thermal simulations, BOM costs, and component availability. Drives board bring-up, power-on, debugging, validation, and cross-functional issue resolution across electrical, firmware, mechanical, thermal, and manufacturing domains.

Designs and validates FPGA RTL solutions for development kits and validation boards using Verilog or VHDL and Altera Quartus II. Develops Nios II embedded firmware in C/C++, performs board bring-up, hardware-software integration, timing closure, simulation, lab validation, and system-level debugging. The engineer investigates RTL, firmware, timing, clocking, memory, and peripheral issues; creates reusable components and automation; collaborates across engineering teams; documents designs and validation results; and provides technical guidance to less-experienced engineers.

Develop and execute system-level test plans for FPGA and multi-chip products. Build automated verification flows, regression scripts, and test content; analyze data and debug production or customer failures to root cause. Collaborate with hardware, software, silicon validation, manufacturing, and customer support teams to improve product quality, test coverage, manufacturability, and platform readiness. Document risk assessments, validation plans, user acceptance tests, and results.

Develop data pipelines and apply statistical analysis, machine learning, and deep learning to semiconductor system and analog design data. Build predictive models for circuit performance, reliability, and yield; design experiments; integrate solutions with design, verification, and test teams; and communicate findings through visualizations and reports. The role requires understanding semiconductor design flows, analog circuits, and system architectures.

Performs semiconductor physical design implementation from RTL through GDS, including synthesis, floorplanning, place and route, clock tree synthesis, timing closure, power and reliability analysis, verification, and signoff. Uses industry-standard EDA tools to optimize power, performance, and area, resolve design violations, support multiple power domains and DFT, and improve physical design methodologies and automation flows.

Develop and verify high-speed SerDes mixed-signal IP across digital, analog, DSP, and firmware-hardware systems. Responsibilities include constrained-random and coverage-driven verification, advanced verification environment development, DSP datapath validation, and root-cause analysis. The role involves the full verification lifecycle from specification through tape-out sign-off and uses AI-assisted engineering tools. Candidates should have a relevant bachelor’s degree and 0–3 years of hardware design or verification experience.