Top Tech Jobs & Startup Jobs

Coordinate recruiting operations and scheduling, maintain ATS accuracy, and support offer coordination. Proactively source technical and early-career talent, engage passive candidates, screen resumes, and build pipelines. Partner with recruiters and hiring managers on sourcing strategy, track pipeline and sourcing metrics, and support recruiting analytics, process improvements, and ad hoc talent projects to improve time-to-fill and candidate experience.

Coordinate recruiting operations and interview logistics, maintain ATS accuracy, and support offer coordination. Proactively source and engage technical and early-career candidates, screen resumes, build pipelines, track sourcing metrics, and partner with hiring managers to improve recruiting processes and analytics.

Design and implement digital logic for MEMS/CMOS timing products: create micro-architecture and RTL (Verilog/SystemVerilog), develop testbenches and SVA, define timing constraints, run synthesis/STA, fix timing, collaborate across teams, and support post-silicon bring-up and validation.

Lead specification, design, development, and qualification of custom semiconductor packaging (QFN, WLCSP, substrate, ceramic, multi-chip). Manage package design, DoEs, OSAT development/prototyping, ensure performance/reliability/quality, and lead troubleshooting and release-to-production activities.

Design and simulate high-performance CMOS analog and custom digital circuits for precision timing products. Prepare design reviews and documentation, collaborate with layout, digital, system, and validation teams, and test, debug, and characterize prototypes in the lab.

Provide technical leadership and hands-on analog/mixed-signal CMOS circuit design for high-performance timing products. Design and develop PLLs, VCOs, phase detectors, and charge pumps; support prototyping, lab characterization, and post-layout verification; collaborate with cross-functional and remote teams; mentor junior designers and drive product development through production release.

Lead analog/mixed-signal circuit design for high-performance timing products, from concept through production. Provide hands-on design of PLLs and related blocks, support prototype testing and lab characterization, collaborate with cross-functional and remote teams, and mentor junior designers.

Lead chip-level planning and perform block- and leaf-cell custom layouts for CMOS/BiCMOS circuits. Drive schematic-driven layouts, floorplanning, power and shielding, DRC/LVS/ERC verification, chip integration and tape-out. Mentor junior/offshore layout engineers and help establish layout methodologies, processes, and automation.

The SEC Reporting, SOX & ESG Compliance Manager prepares SEC filings, manages SOX compliance, and coordinates ESG reporting, collaborating across functions for process improvement.

The Time Synchronization System Architect will develop technical relationships with key customers, drive architectural discussions, influence SiTime's roadmap, and advocate technical expertise for design wins in data centers and networking markets.