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10 Days AgoSaved
Remote
Zagreb, Grad Zagreb, HRV
4K-4K Annually
Mid level
4K-4K Annually
Mid level
Information Technology
The FPGA Engineer will design and integrate FPGA solutions for Open RAN Radio Units, optimize DSP algorithms, and validate designs using Xilinx tools, among other responsibilities.
Top Skills: AIDspFpgaGitGitLinuxSiemens QuestaSystemverilogVerilogVhdlVivadoXilinx
Reposted 11 Days AgoSaved
In-Office
Sunnyvale, CA, USA
100K-125K Annually
Mid level
100K-125K Annually
Mid level
Information Technology
The Project Manager will create and own PM processes, manage software deliverables, facilitate cross-functional alignment, and leverage AI tools to improve throughput.
Top Skills: AgileAi Tools (GeminiChatgpt)ClaudeJIRAScrum
22 Days AgoSaved
In-Office
Sunnyvale, CA, USA
155K-180K Annually
Senior level
155K-180K Annually
Senior level
Information Technology
The Senior PCB Layout Engineer will own end-to-end layout for high-density PCBs, focusing on high-speed signals, RF precision, and design for manufacturability while collaborating with vendors and managing component libraries.
Top Skills: Altium DesignerHigh-Speed Digital DesignIpc StandardsPcb DesignRf Design Principles
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