Top Tech Jobs & Startup Jobs

Manage financial control for a large-scale data center, overseeing CAPEX/OPEX, budgeting, compliance with accounting regulations, and cost analysis.

Write and optimize CUDA/Triton kernels to implement novel ML efficiency methods; perform performance attribution and roofline analysis across the serving stack; make slow reference implementations production-viable; collaborate with AI Cloud platform team and build measurement foundations for research-driven optimizations.

Design and implement Verilog RTL for SoC blocks, integrate IPs, and support synthesis, timing closure, power optimization, and floorplanning. Contribute to design verification and emulation, assist with pre- and post-silicon debugging, and automate design tasks with scripting.

Develop and execute test plans for digital design verification, manage regressions and coverage, and collaborate with design teams to ensure design correctness.

Develop and execute comprehensive, coverage-driven verification environments using SystemVerilog/UVM. Implement testbenches, run RTL simulations/emulation (Palladium/HAPS/Zebu), debug RTL, maintain regression suites, improve coverage metrics, and document verification results.

Own and optimize the performance-critical LLM serving runtime: scheduling, batching, KV cache, speculative decoding, long-context and streaming. Tune and operate runtimes (vLLM, Dynamo, TensorRT-LLM, etc.), profile GPU/network/tokenizer bottlenecks, lead model onboarding (parallelism, quantization, context), define runtime playbooks, and partner with SRE and performance teams to deploy production improvements for latency, throughput, and cost efficiency.

Design, deploy, and maintain CSI drivers and GPUDirect Storage integrations for high-performance file systems; implement NVMe caching and optimize IOPS/throughput/latency across containerized storage. Collaborate on RDMA/InfiniBand tuning, define Kubernetes storage policies and multi-tenancy isolation, implement monitoring/alerting, and mentor junior engineers.

The Senior DFT Engineer will implement boundary scan, MBIST, develop test methodologies, and collaborate on test patterns for ATE debugging.

The Power Quality Engineer supports global data centers by monitoring and optimizing power quality, reducing equipment failures, and ensuring compliance with international standards.

Build global, multi-region cloud control-plane services for GPU infrastructure, including tenant management, quotas, metering, billing, ticketing, RBAC, customer portals, and APIs. Design cross-region consistency, automate customer onboarding, ensure billing auditability, develop operational recovery tooling, and support region-aware scheduling and placement.