Top Tech Jobs & Startup Jobs

The Graduate Talent Trainee program develops graduates into skilled professionals in areas like data engineering and product management through hands-on experience and training.

Lead global treasury front office: FX risk management and hedging, liquidity and cash optimization, bank relationship management, trade/project financing, TMS implementation, governance, and treasury advisory across jurisdictions.

The Senior Legal Counsel will provide legal support for capital markets transactions, compliance with SEC regulations, M&A, and corporate governance at Bitdeer.

Manage financial control for a large-scale data center, overseeing CAPEX/OPEX, budgeting, compliance with accounting regulations, and cost analysis.

The Project Coordinator will support the high-level construction of an AI Datacenter, managing schedules, documentation, vendor coordination, and communication to ensure timely project execution and compliance with Norwegian standards.

The Sales Manager is responsible for executing sales strategies, identifying new business opportunities, managing client relationships, and preparing market reports. They will collaborate with internal teams and lead promotional activities.

Manage end-to-end procurement for AI compute: supplier development, RFQ, negotiation, contracts, and delivery for GPU/CPU servers, EDA software, datacenter services; track market trends, control spend, mitigate cross-border and licensing risks, and report on supplier performance.

Develop and execute comprehensive, coverage-driven verification environments using SystemVerilog/UVM. Implement testbenches, run RTL simulations/emulation (Palladium/HAPS/Zebu), debug RTL, maintain regression suites, improve coverage metrics, and document verification results.

Design and implement Verilog RTL for SoC blocks, integrate IPs, and support synthesis, timing closure, power optimization, and floorplanning. Contribute to design verification and emulation, assist with pre- and post-silicon debugging, and automate design tasks with scripting.

Lead end-to-end physical implementation of high-speed PCIe controller and PHY blocks from netlist to GDSII. Perform floorplanning, placement, CTS, routing, STA, timing closure across PVT corners, power integrity (IR/EM) analysis, DRC/LVS/ERC signoff with Calibre, and tapeout support. Collaborate with RTL, synthesis, DFT, and verification teams and contribute to PD methodology and automation scripting.