Top Tech Jobs & Startup Jobs

Lead legal counsel for Marvell's India operations, advising on commercial, employment, data privacy, IP, regulatory and government-relations matters. Draft and negotiate agreements, manage investigations, litigation and outside counsel, develop policies, train staff, support licensing and compliance, mentor local team, and monitor laws and risks to enable business objectives.

The Employee Relations Specialist manages employee relations issues, ensures legal compliance, and provides guidance to managers on workplace matters. They conduct investigations, analyze ER data, and collaborate on organizational initiatives.

The People Services Partner manages HR operations, leads service center functions, oversees onboarding/offboarding processes, and ensures compliance and audit readiness, while optimizing HR technology and analyzing operational trends.

Design and implement test architecture and RTL for high-speed coherent transceivers. Develop RTL, run testbench simulation and verification, debug functional issues, produce block-level specs and documentation, and support synthesis, timing closure, and physical implementation teams.

Develop functional System-on-Chip (SoC) simulation models, write embedded software to test and validate models, improve test automation and scripting, debug and refine models and test cases with the engineering team, and document work for knowledge sharing.

Lead micro‑architecture and RTL development for high‑performance connectivity ASICs. Define SoC specs, implement SystemVerilog RTL, drive front‑end flows (lint/CDC/synthesis/STA), support timing closure and PNR, collaborate on verification, pre‑ and post‑silicon validation, and mentor cross‑functional teams to deliver tape‑out ready designs.

Assist in the design and layout, silicon evaluation, and testing of analog circuits, while gaining training in System Verilog and Python scripting.

The Digital IC Design Junior Engineer will analyze specifications, design RTL modules, prototype IP blocks, maintain existing RTL, and develop verification strategies for high-speed communication chips.

The intern will design forward error correction (FEC) and DSP algorithms for optical transceivers, focusing on hardware implementation and system modeling.

The role involves supporting IC design and layout, silicon evaluation, and characterization while gaining advanced analog training and running simulations.