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Develop power solutions for Marvell devices, evaluate designs for electrical performance, collaborate with layout engineers, and perform simulations for efficiency. Require expertise in power integrity, PDN design, and knowledge of circuit elements.

The Sr. Customer Portfolio Manager at Marvell will coordinate with strategic customers, manage program portfolios, and collaborate with cross-functional teams to ensure successful product delivery. Responsibilities include risk management, problem escalation, and effective communication within the organization and with customers.

The Staff Engineer will lead the development of high-speed SerDes and Analog Mixed-Signal IPs in advanced technology nodes. Responsibilities involve designing high performance circuitry, guiding layout engineers, working on IP characterization, and providing product and customer support.

Seeking a Senior Staff Analog Mixed-Signal IC Design Engineer with expertise in CMOS technologies and design of mixed signal circuits. Responsibilities include architectural investigations, design verification, layout activities, and collaboration with cross-functional teams. Requires 5-10 years of experience.

The role involves leading a team of analog design engineers in designing CMOS transceiver, PLL, DLL, ADC, and amplifiers. Responsibilities include architectural investigation, design verification using industry-standard tools, interfacing with layout and application teams, and managing analog IP delivery from concept to production.

The Hardware Board Design Principal Engineer will lead PCB design for system projects, focusing on high-speed digital and analog circuitry, ensuring that designs meet product definitions and project objectives. Responsibilities include managing the entire design lifecycle, collaborating with various teams, and overseeing design phases from architecture through to testing and manufacturing.

The Analog IC Design Engineer will design sophisticated CMOS transceiver/SERDES products, focusing on circuits like PLL, ADC, and amplifiers. They will also engage in design verification using SPICE and MATLAB, and perform layout activities in nanometric technologies. Interaction with cross-functional teams for design integration and customer support is also expected.