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Develop software infrastructure, tooling, and optimization systems for custom SRAM memory solutions. Collaborate with circuit designers to implement power, performance, and area data, create design kits, streamline memory selection, analyze and document results, and present findings to internal stakeholders. The intern will use scripting in Linux environments and version-control systems while applying software and circuit fundamentals to semiconductor memory projects.

Leads end-to-end execution of customer-driven custom and semi-custom semiconductor programs, from initiation and planning through development, validation, qualification, sample delivery, production release, and closure. Manages schedule, quality, cost, risks, communications, and issue resolution across matrixed engineering, operations, business, customer, and executive stakeholders. Drives alignment, mitigation planning, post-mortems, and continuous improvement.

The role involves improving demand forecast accuracy, implementing ML models, and collaborating with various teams to analyze market trends.

Lead the development and maintenance of analog/mixed-signal CAD infrastructure and automated design flows for advanced semiconductor technologies. Architect simulation environments, support AMS tools, troubleshoot modeling and verification issues, collaborate with designers, foundries, TCAD teams, and EDA vendors, and develop scripting-based productivity tools. The role also covers custom verification checks, model QA, PDK integration, netlisting, and company-wide CAD methodology for analog, RF, and silicon photonics development.

Design and develop SERDES/D2D firmware and networking software using embedded C/C++. Enhance MCU coprocessor and hardware accelerator features, support hardware bring-up, develop multithreaded software, troubleshoot hardware and software issues, optimize Marvell SoC performance, and collaborate with validation and hardware/software engineering teams to resolve customer issues.

Design For Test intern supporting DFT insertion, pattern generation, verification, and testability analysis for complex SoCs. The role includes working with Scan, MBIST, Boundary Scan, and IP macro test flows; resolving DFT issues; automating workflows with Tcl, Python, or shell scripting; improving methodologies and documentation; and presenting project results. Candidates should be pursuing a master’s degree in computer or electrical engineering and understand digital logic and DFT concepts.

Develop and optimize semiconductor test programs for the Advantest 93K platform, including characterization, production, wafer sort, high-speed testing, pattern conversion, and test flow improvement. Collaborate with design, DFT/DFM, and product engineering teams to improve yield, reduce test time, document methodologies, and release production test programs.

Lead end-to-end board and package design for switch products: define architecture, select components, perform schematic entry and PCB layout, ensure SI/PI and power design, guide ODM partners, lead post-silicon bring-up and collaborate with device, system, and test teams.

Lead NPI silicon bring-up and product engineering for networking/switch/processor lines. Drive cross-functional yield analysis, statistical data analysis, test development/debug, root-cause resolution, and implement improvements to meet mass-production release goals.

Serve as customer-facing quality engineer for IC or optics products: lead customer engagements, assess reliability risk, execute qualification plans, drive 8D problem-solving and quality improvement, integrate customer requirements into QMS, and report to executives to achieve best-in-class supplier quality.