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Intern will work on ML system software for rack-scale systems, focusing on network performance, telemetry, hardware validation, and system health analysis.

As an Accelerator Software Engineer, you will develop firmware and software for an ASIC, collaborating on design and implementation across multiple domains, including host-side drivers and microcontroller architecture.

As an Inference Intern, you will support model porting, enhance runtime systems, optimize routing layers, and implement high-performance software for AI architectures.

As a Design Verification intern at Etched, you'll validate custom IPs for chip performance and correctness, collaborating with various technical teams.

Develop performance models for AI chips, analyze deep learning workloads, optimize hardware-software co-design, and collaborate on architectural decisions for efficiency.

The Finance Intern will support financial operations, execute financial models, assist in accounting, and collaborate with the executive team on strategic financial challenges.

Design and build performance analysis and profiling tooling for a custom PCIe ML accelerator. Collect hardware counters and traces, correlate events across CPU, accelerator, storage and networking, and create visualization and analysis tools. Collaborate with hardware, compiler, firmware, and inference engineers to identify bottlenecks and improve performance.

Build and own manufacturing test and factory software: backend services, APIs, data pipelines, release and versioning systems, test station applications, and integrations with MES/SFIS. Support NPI and production ramp, productionize prototypes, and travel to domestic and international manufacturing partners for factory bring-up and deployments.

Lead system-level reliability for Etched's servers, racks, and datacenter platforms. Define reliability strategy, qualification gates, accelerated and environmental testing, failure analysis, and reliability modeling (MTBF, Weibull, FIT). Build telemetry, fleet feedback, and validation processes; drive cross-functional root-cause investigations; enforce ODM/JDM reliability commitments; and hire and lead a product reliability engineering organization to ensure enterprise-grade field reliability.

Design and optimize AI accelerator architectures focusing on performance and efficiency for transformer workloads. Collaborate cross-functionally on innovative chip designs.