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Own and architect the automated RTL-to-GDSII physical design flow: build/maintain CAD infrastructure, automate regressions and run management, integrate signoff tools, create PG meshes and DRC-clean floorplans, drive PPA tuning and timing correlation, and partner with block owners to encode methodology fixes for scalable tapeout.

Own block- and subsystem-level physical design from synthesis through GDSII sign-off: floorplanning, synthesis, placement, CTS, routing, timing closure, signoff (EM/IR/RC/DRC/LVS), generate abstracts and timing budgets, collaborate with RTL designers, and supervise outsourced PD work.

Lead full-chip physical implementation from synthesis to GDSII: floorplanning, P&R, clocking, MMMC timing closure, timing constraints and ECOs, full-chip physical verification (DRC/LVS/ERC/antenna/density/fill), debug PV violations, and tapeout signoff using automated flows and Innovus.

Lead schematic and board development for accelerator systems, collaborate with SI/PCB/mechanical teams and ODMs/OEMs, manage PCBA documentation and BOMs, perform bring-up and validation, define test plans and manufacturing test equipment, and ensure datacenter requirements for high-power AI servers are met.

Own demand forecasting, supply planning, and finished-goods inventory to meet S&OP objectives. Build and execute weekly, monthly, and quarterly demand-supply plans; monitor planned vs. actual builds and inventory across SKUs; translate forecasts into executable build plans with Manufacturing and Global Supply Management; lead scenario planning and risk mitigation under capacity or component constraints; and drive continuous improvement of planning processes, tools, and models.

The Global Supply Manager will strategically source and manage suppliers for L11 hardware, collaborating with engineering and operations to ensure efficient production and supply chain resilience.

Own electrical debug and failure analysis for PCBA and L10 server hardware from NPI through volume ramp. Diagnose/repair boards, run test equipment, improve yield with CMs/ODMs, influence component selection, and drive reliability and manufacturing improvements.

The Quality Engineer will oversee quality assurance processes for suppliers and integrators of advanced AI hardware, ensuring compliance with standards and driving continuous improvement.

Own people operations including payroll, benefits, and compliance; respond to employee inquiries; design onboarding/offboarding, performance management, and compensation frameworks; build people analytics dashboards and maintain accurate people data; partner with leadership on org design and scaling.

The DFT Engineer ensures efficient testability of ICs, develops DFT architectures, verifies implementations, and collaborates with teams for optimal production support.