Top Tech Jobs & Startups Jobs

Join the leading chiplet startup as a Senior Analog Design Engineer. Responsible for developing custom analog mixed-signal blocks for high-speed wireline links and collaborating with digital teams to optimize designs. Must have a minimum of eight years of experience in designing high-speed SerDes components and proficiency in Cadence Virtuoso design environment.

Join the leading chiplet startup as a Physical Design Engineer responsible for establishing methodologies for high-speed block design, integrating analog/mixed signal blocks, developing correct-by-construction designs, and automating flows for efficiency. Requires expertise in physical design, timing, and scripting.

Join the leading chiplet startup as a Digital Verification Engineer to ensure correctness of new silicon designs. Responsibilities include verification of analog mixed signal designs, test plan development, authoring test benches, creating assertions, and collaborating with designers. Ideal candidates have expertise in UVM, SystemVerilog, and experience with power-aware design and mixed-signal verification.

Join an early-stage chiplet startup as a Digital SoC Design Engineer/Lead. Define microarchitecture, write RTL, work on memory systems, and drive team to milestones. Requires 10+ years of experience in logic design and memory systems.

Join the leading chiplet startup as a Digital Design Engineer. Define, implement, and ensure correctness of novel RTL for major blocks in chiplet based systems. Collaborate with cross-functional team to innovate high-volume, high-performance products. Responsibilities include RTL design, specification writing, formal verification, and silicon bring-up. Requires BS EE with 5 years of experience.

Join a leading chiplet startup as a Senior Analog Design Engineer in the Netherlands. Develop custom analog mixed-signal blocks for high-speed wireline links, collaborate with digital teams, and perform post-silicon validation. Ideal candidates have a M.S. or Ph.D in Electrical Engineering and 8+ years of experience in designing high-speed SerDes components.

Lead a team of physical design engineers developing chiplets and chiplet IPs, define and implement innovative design methodologies, collaborate with cross-functional teams to deliver customer-ready products, automate flows and processes to maximize efficiency, develop flows for identifying weaknesses in implementations, and automate sign-off tools for timing, DFM, reliability, EM/IR.