Top Tech Jobs & Startup Jobs

The Firmware Engineer will lead the development and deployment of firmware for chiplet systems, working on design, testing, and implementation of C/C++ functions for high-performance devices. Responsibilities include defining FW environments, designing APIs, and collaborating with cross-functional teams to ensure quality and performance of the products.

As a Design Verification Engineer, you will verify Analog Mixed Signal designs, define and execute test plans, author test benches, create assertions and coverage metrics, and collaborate with RTL and Analog designers to ensure design correctness.

The Physical Design Lead will develop innovative methodologies for chiplet design and work collaboratively with engineers to ensure efficiency and correctness in high-speed block implementations. Responsibilities include leading a team, establishing design flows, and automating processes to enhance productivity, while integrating various signal blocks and managing customer-ready products.

As a Physical Design Engineer, you will define and implement methodologies for high-speed design, ensuring correctness in chiplet systems. Your role includes automating design flows, collaborating with analog and digital teams, and developing checks for design efficiency and reliability.

As a Signal and Power Integrity Engineer, you will work on packaging solutions for chiplet interconnects, focusing on design, modeling, and testing. You will collaborate with circuit designers for performance optimization, manage signal integrity simulations, and lead power delivery network designs while handling lab measurements and issues.

As a Digital Design Engineer, you will define and implement RTL for major chiplet blocks, ensuring high quality and supporting verification processes. You will collaborate with a cross-functional team to innovate and develop high-performance, manufacturable products, from design specification to silicon characterization.

The Senior Digital Design Engineer will develop micro-architecture specifications and RTL design descriptions for Ethernet PCS/PMA IPs. Responsibilities include optimizing designs for power, area, performance, collaborating with verification and physical design teams, and ensuring compliance with Ethernet standards. The role requires strong expertise in SystemVerilog and extensive experience in high-speed digital design.