Top Tech Jobs & Startup Jobs

Lead technical and science communications showcasing Riverlane’s quantum error correction research, engineering, products, and technology roadmap. Create blogs, articles, white papers, videos, flagship reports, and thought leadership content for technical and commercial audiences. Collaborate with scientists, engineers, product, marketing, and commercial teams to translate complex concepts accurately and engagingly, identify audience opportunities, and use data to improve content performance.

Lead technical development of DF-AMO, converting decoding research into a scalable, production-ready QEC software stack. Drive architecture, performance (latency/throughput) trade-offs, collaborate with engineering, research, product and customers, and mentor/manage a growing team of 5+ engineers to deliver from concept through deployment and adoption.

Lead design and implementation of a LLVM/MLIR-based compiler toolchain for error-corrected quantum computing. Build compilers, emulators, profilers, and debuggers; implement optimizations and IR transformations; own substantial parts of the software stack; mentor engineers; collaborate with hardware and science teams to integrate error-correcting codes and runtimes.

Design and build compilers, emulators, profilers and debuggers for error-corrected quantum systems. Implement QEC codes and runtimes, write maintainable code, collaborate with scientists and engineers, and deliver components of an LLVM MLIR-based compiler and runtime.

Lead development of Deltakit, turning QEC research into robust open-source software. Drive design, delivery, performance and scalability, mentor engineers, collaborate across teams, engage the research community, and run workshops to support adoption and shape technical direction.

Lead the strategy and roadmap for Deltakit, an open-source QEC SDK. Engage users and partners, prioritise features, align cross-functional teams, support launches, drive developer adoption and community growth, and ensure strong documentation and onboarding.

Lead and set the direction for Riverlane's open-source SDK (Deltakit), driving teams that build simulators, analysis tools, visualizers and core components. Prioritise community-facing components, collaborate with product and internal developers, engage the global developer community, and amplify internal engineering efforts to produce widely accessible software.

Own end-to-end functional verification for block- and system-level designs. Define verification plans and strategies, build scalable SystemVerilog testbenches (UVM/OVM) with checkers, reference models, and SVA. Implement directed, random and self-testing, track regressions, coverage metrics and bugs, and debug across RTL, simulation and hardware. Collaborate with designers and architects to ensure high quality and reliability.

Lead FPGA integration for Riverlane's Deltaflow hardware: write RTL, implement and verify FPGA designs, benchmark latency, support on-site system deployments, debug with customers, and feed product improvements back to engineering and product teams.

Develop and maintain Deltakit, an open-source platform for quantum error correction. Implement software tools and parts of the QEC compiler, collaborate with scientists and engineers, engage with the user community, write maintainable code, and support adoption and feedback-driven improvements.