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Manage complex SoC and MCU hardware development projects from concept through mass production. Responsibilities include planning schedules and budgets, coordinating design, verification, software, and manufacturing teams, tracking milestones and KPIs, mitigating risks, communicating with stakeholders and senior management, improving project processes, sharing best practices, and mentoring junior project managers. The role requires strong semiconductor hardware knowledge, project leadership, and experience managing large-scale development programs.

Leads global test and product engineering strategy for power semiconductor products, owning characterization, qualification, yield ramp, test development, high-volume manufacturing, and sustaining operations. Drives ATE standardization, test-cost reduction, manufacturing readiness, yield and quality improvement, excursion resolution, and customer-return management. Partners cross-functionally with design, quality, reliability, operations, and manufacturing teams while managing budgets, headcount, capital planning, organizational development, and succession planning.

Own product definition, business planning, and go-to-market strategy for Renesas power and analog semiconductor products in India. Identify market opportunities, analyze TAM/SAM/SOM and competitive positioning, support customer design-ins, develop technical collateral, train customers and sales teams, coordinate product launches, forecast demand, manage supply transitions, and align engineering, sales, operations, and global teams. The role also supports hiring and building the marketing organization.

Manages multiple HR projects from planning through completion, including timelines, milestones, action tracking, risk resolution, stakeholder coordination, reporting, process improvement, communications, workshops, and training logistics. Partners with HR leadership, HR Business Partners, Centers of Excellence, and HR Operations to maintain alignment, follow through on deliverables, and improve standardized HR processes.

Designs and owns analog IC blocks for PMICs and linear or switching DC-DC converters. Responsibilities include architecture development, transistor-level schematic design, simulation, verification, parasitic extraction, analog layout guidance, ESD and I/O ring design, silicon validation, debugging, and mentoring junior engineers. The role requires full ownership of multiple blocks and collaboration on subsystem and chip-top development.

Develop test methodologies and requirements for radiation-hardened semiconductor ICs used in space applications. Responsibilities include writing characterization and production test programs, designing ATE load boards, defining test schematics and hardware, debugging test solutions, correlating production tests with bench measurements, performing GR&R and transient analyses, and transferring solutions to production.

Lead design and implementation of application, firmware, and BSP on RCar SoCs for automotive and robotics. Perform system bring-up, debug low-level drivers (Ethernet AVB/TSN, MIPI CSI-2, ISP, I2C, UART, GPT), and integrate solutions across Linux, ROS2, Zephyr, and FreeRTOS. Use modern C/C++, Python, GitLab CI/CD, Docker, and hardware debuggers. Apply knowledge of object detection, SLAM, sensor fusion, and ISO 26262 functional safety.

Technical leader driving next-generation Intelligent Power Device design and delivery. Lead cross-functional teams through concept to production, define system architectures, ensure automotive reliability and ISO 26262 compliance, drive verification and test strategies, mitigate silicon and system risks, and mentor engineers.

Develop and maintain SystemC TLM 2.0 performance models for complex SoCs, analyze and optimize CPU/GPU/DDR/interconnect/PCIe/UCIe performance, run simulations, identify bottlenecks, propose improvements, collaborate with cross-functional teams, and mentor junior engineers.

Technical leader driving development of next-generation Intelligent Power Devices: define system architectures, lead cross-functional teams through lifecycle, ensure AEC-Q100 and ISO 26262 compliance, drive verification, modeling, testing, risk mitigation, and mentor engineers to deliver production-ready IPD solutions.