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Design and implement graph compiler optimizations (fusion, quantization, tiling) to convert TensorFlow/PyTorch models into IR, improve performance and hardware utilization, collaborate with ML researchers and hardware architects, and lead a team focused on compiler and code-generation improvements.

Lead design and implementation of graph compiler optimizations to convert TensorFlow/PyTorch models into IR, improve performance via fusion, quantization, and tiling, collaborate with hardware and ML teams, and mentor engineers to enable efficient deployment on EnCharge inference accelerators.