Top Tech Jobs & Startup Jobs

The PHY Design Engineer will design low-power communication systems and develop micro-architecture and SystemVerilog RTL. Responsibilities include collaborating on product specifications, design verification, identifying bottlenecks, and providing guidance to teams on physical design and timing closure.

The Principal PHY/MAC RTL Design Engineer will be responsible for implementing MAC and PHY algorithms for low power IoT connectivity devices, developing specifications, creating micro-architecture in Verilog/Systemverilog, verifying designs, and collaborating with cross-functional teams.

As a PHY Verification Engineer/Lead at InnoPhase IoT, you will define and develop UVM testbenches for wireless PHY and MAC layers, collaborating with design and system engineers. Responsibilities include optimizing test plans, conducting verification coverage analysis, running regressions, and refining verification tools. Your role also involves debugging and problem-solving in a team environment.