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Design and implement test solutions for wireless connectivity products. Characterize RF, mixed-signal, and power management blocks. Develop test plans for regulatory compliance and automate bench test programs.
This role involves technical leadership in developing integrated custom analog and mixed signal IPs. The responsibilities include hands-on contribution to the design of high-performance analog-to-digital converters (ADCs) in advanced CMOS processes, supervising layout activities, working with cross-functional teams, and participating in post-silicon bring-up and performance characterization.
Join Innophase IoT as a WiFI MAC Design Engineer/Lead and be responsible for Low-power WiFi, BT/BLE micro-architecture and design.
We are looking for a highly motivated, analytical Principal Software Engineer with embedded software development experience to help build our next generation IoT product.
Join Innophase IoT as a Senior ASIC Design Engineer and be contribute to the development of Low-power WiFi, BT/BLE RTL design, and implementation. Your responsibilities include RTL development, synthesis, timing closure, and collaboration with RTL and Physical Design teams.
As a Principal/Sr. Staff Digital Design Engineer, you will be working with a team of design engineers to develop novel SoC products for connectivity and communications. You will also be a key contributor to product definition and resulting detailed device performance and functional requirements specifications.
Define, design, and develop MAC features and algorithms for 802.11 standards. Conduct design reviews, perform post silicon validation, and ensure implementation meets targets.
Develop test specifications, test plans, and test systems for wireless IoT solutions. Collaborate with cross-functional teams and analyze test results.
Join Innophase IoT group as a PHY Design Engineer and be responsible for Low-power WiFi, BT/BLE micro-architecture and design.
Join Innophase IoT as a hands-on PHY Verification Engineer responsible for Low-power WiFi, BT/BLE verification. Work on developing hierarchical UVM testbenches, collaborating with design and system engineers, and maintaining releases and regressions.
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