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Design and implement automated test solutions for RF connectivity SoC devices, ensuring high performance and quality for wifi and Bluetooth products.

Develop embedded firmware for IoT devices, implement drivers, optimize secure firmware solutions, and collaborate with cross-functional teams for robust device operations.

As a PHY Design Engineer, you will develop low-power wireless communication systems, engage in RTL design, analyze bottlenecks, and collaborate with verification teams.

As a Physical Design Principal Engineer, you'll lead SOC implementation and verification, ensuring design and timing closure from RTL to GDS, collaborating with teams on architectural studies.

Responsible for PHY verification in Low-power WiFi and BT/BLE; involves UVM testbench development, coverage analysis, and collaboration with systems and design engineers.

Implement MAC and PHY algorithms for low power IoT devices, focusing on digital design, verification, and low power techniques. Collaborate with cross-functional teams.

The Senior Staff/Principal Engineer will lead digital SoC design and verification, work on product specifications, and collaborate with cross-functional teams.

Define, develop, and refine hierarchical UVM testbench for verification of wireless PHY and MAC layers. Requires up to 5% domestic travel.

Lead design verification for SoC and IP blocks, develop test benches, execute verification plans, and debug use-cases while collaborating with the design team to ensure quality and functionality.

The Design Verification Engineer is responsible for constructing test benches, developing verification plans, debugging use-cases, and collaborating with design teams to ensure compliance with specifications.