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The Senior Software Engineer will enhance and develop debugging and profiling tools for SiFive RISC-V processors, including OpenOCD, GDB, and LLDB. Responsibilities include collaboration with hardware engineering teams, best practices in software lifecycle, and customer support for tool functionalities.
The Staff Field Applications Engineer will lead pre-sales technical engagements with customers, focusing on CPU and SoC architecture solutions. Responsibilities include managing customer interactions, articulating technical requirements, collaborating with sales, and supporting marketing initiatives. Extensive knowledge in CPU microarchitecture and firmware development is essential.
The Debug, Trace and Profiling Architect will develop and define platform requirements, oversee the micro-architecture implementation, and work with various teams on debug strategy and profiling solutions. The role includes direct customer engagement to understand their needs and participation in relevant industry groups.
As a Design Verification Engineer at SiFive, you will create a scalable test environment, generate automated test cases based on team requirements, and develop tools for memory subsystem and interconnect verification. Responsibilities include collaborating on specifications, developing checkers, analyzing coverage, and improving verification methodologies.
The Sr. Staff Field Applications Engineer at SiFive will manage customer engagements focusing on CPU and SoC architecture requirements. Responsibilities include providing technical solutions, collaborating with sales, conducting product demos, and supporting marketing initiatives. The role requires strong expertise in CPU architecture and software development along with customer-facing experience.
The Staff Hardware Application Engineer will support customers using SiFive IP, resolve integration issues, collaborate with engineering teams, deliver customer training, and improve documentation. They will need excellent communication skills and a strong technical background.
The Staff Engineer will focus on hands-on development in System Verilog/UVM for CPU verification, writing test cases, and using test generators for RISCV CPU. The role requires collaboration in targeting coverage and test-plan scenarios and involves significant experience in digital verification, preferably in CPU design.
The Senior Staff Engineer will lead the development of software for SiFive development boards, including Bare Metal and Linux distributions, collaborating with internal teams and external partners. This role involves creating a software roadmap and following best Open Source practices for SiFive systems, along with contributing to advanced RISC-V IP software features.
As a Sr. Staff System and Software Architect, you will design and implement RISC-V computing systems, focusing on both software and hardware architecture. This involves authoring architecture specifications, collaborating with global engineering teams, and developing low-level code for multiprocessor systems. You will engage with key industry organizations and create software that integrates with existing operating systems.
As a Staff Software Engineer, you will architect and implement features and internals for a compiler related to RISC-V, develop tools for the language ecosystem, and design quality code to meet expanding business requirements while interfacing with various teams in SiFive.
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