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The Senior Systems Engineer will design and develop fixed wireless access platforms, focusing on physical layer algorithms and their implementation. Responsibilities include developing a Matlab link level simulator, conducting PHY and MAC layer performance analyses, and optimizing system performance in collaboration with software and hardware teams.

The Senior ASIC Design Verification Engineer will work in a collaborative environment to verify powerful SoCs for broadband wireless access, defining verification strategies and improving methodologies. Responsibilities include working with DSP, software engineers, and system architects to ensure verification coverage is met.

The FPGA Design Engineer will implement, debug, and verify designs in large FPGAs, participating in integration, validation, and troubleshooting. Responsibilities include logic design, simulation, documentation generation, and collaboration with software and hardware teams.