FPGA Design Engineer

Posted 8 Days Ago
Be an Early Applicant
Milpitas, CA
120K-155K Annually
3-5 Years Experience
Information Technology
The Role
The FPGA Design Engineer will implement, debug, and verify designs in large FPGAs, participating in integration, validation, and troubleshooting. Responsibilities include logic design, simulation, documentation generation, and collaboration with software and hardware teams.
Summary Generated by Built In


Tarana is a fast revenue growth company built by outstanding talented people and with innovative technology. Our FPGA design team is looking for a smart, experienced, and hardworking member to participate in the development and test of FPGAs for Tarana's next generation Fixed Broadband Wireless Access Basestation and next generation ASIC emulation in FPGA. The ideal candidate would have 2+ years of FPGA logic design experience.

Job Responsibilities:

  • Primary responsibilities include implementing, debugging, and verifying designs in large FPGAs
  • Participating in sub-system and system level integration, validation and troubleshooting
  • Perform FPGA level logic design, simulation, test, and debugging tasks
  • Participating in module level design and simulating a specified functional block or sub-system
  • Generating design documentation and reviewing test results
  • Interfacing with software and hardware designers to support software, hardware and system integration 

Required Skills & Experience:

  • BSEE required/MSEE preferred
  • 2-5 years related experience in logic designs for FPGA
  • High-speed digital design experience
  • Familiar with the latest FPGA technology, with experience in Xilinx Vivado or Intel Quartus FPGA synthesis, place & route tools.
  • Proficiency with Verilog, System Verilog, digital logic design, simulation and FPGA implementation 
  • Good knowledge and working experience with commonly used FPGAs and IC devices
  • Experience with debugging FPGA logic designs using Vivado chipscope or Quartus signal tap.
  • Familiarity with common lab equipment and tools
  • Familiarity with common scripting tools such as python
  • Able to program in C or MatLab a plus

Experience and knowledge in at least one of the following areas is preferred:

  • Design and implementation of FPGA logic for wireless PHY, including signal processing functions for modulation/demodulation
  • Implementation of arithmetic and Digital Signal Processing algorithms in FPGA

 

The salary range for this position is: $120,000 to $155,000

Compensation will be determined based on several factors including, but not limited to: skill set, years of experience and the employee’s geographic location.

Tarana provides competitive benefits to employees in this role including: Medical, dental and vision benefits, 401K match, flexible time off and stock option. 

Top Skills

C
Matlab
Python
System Verilog
Verilog
The Company
HQ: Milpitas, California
432 Employees
On-site Workplace
Year Founded: 2009

What We Do

Tarana’s mission is to accelerate the deployment of fast, affordable internet access around the world. Through a decade of R&D and more than $400M of investment, the Tarana team has created a unique next-generation fixed wireless access (ngFWA) technology instantiated in its first commercial platform, Gigabit 1 (G1). It delivers a game-changing advance in broadband economics in both mainstream and underserved markets, using either licensed or unlicensed spectrum. G1 started production in mid-2021 and has since been embraced by more than 250 service providers in 19 countries and 41 US states.

Tarana is headquartered in Milpitas, California, with additional research and development in Pune, India. Visit our website for more on G1.

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