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2 Hours Ago
Hsinchu County, TWN
3,470 Employees
Expert/Leader
3,470 Employees
Expert/Leader
Software • Automation
The Principal Engineer will lead design efforts for high-speed low-noise clocking circuitry, including fractional-N PLLs and clock distribution networks. Responsibilities include designing, simulating, and verifying circuits, collaborating with team members, and optimizing performance of clocking networks.
2 Hours Ago
Hsinchu County, TWN
3,470 Employees
Senior level
3,470 Employees
Senior level
Software • Automation
The Principal Engineer will engage in designing and implementing high-speed analog and mixed-signal verifications while collaborating with teams to model mixed-signal IPs and conduct thorough functional verification and timing analysis. This role involves hands-on skills in UVM verification flow and experience with high-speed communication systems.
2 Hours Ago
San Jose, CA, USA
3,470 Employees
108K-200K Annually
Mid level
3,470 Employees
108K-200K Annually
Mid level
Software • Automation
As a Senior Software Engineer at Infinera, you will engage in designing and implementing software for next-gen Line Card Modules, focusing on Embedded Linux platform. Your role includes managing existing software systems, developing POCs, and collaborating across multiple teams on product development.
18 Hours Ago
San Jose, CA, USA
3,470 Employees
116K-215K Annually
Senior level
3,470 Employees
116K-215K Annually
Senior level
Software • Automation
The Sr. Payroll Analyst at Infinera will manage payroll processing for 1500 employees, handle bi-weekly payroll operations, and ensure compliance with multi-state and federal taxation laws. Responsibilities include reconciling hours worked, processing 401(k) deductions, and creating payroll processes while maintaining effective communication and organizational skills.
18 Hours Ago
Annapolis Junction, MD, USA
3,470 Employees
121K-225K Annually
Senior level
3,470 Employees
121K-225K Annually
Senior level
Software • Automation
As a Staff Engineer in the TME team, you will execute customer test plans, provide technical support during various product launch phases, and assist in the development of customer-specific documentation. This role involves troubleshooting, collaborating with multiple teams, and becoming an expert on new product specifications and features.
3,470 Employees
Senior level
Software • Automation
The Technical Support Engineer will test and commission DWDM systems, prepare documentation, lead advanced technical support for customers, manage complex troubleshooting cases, and ensure timely resolution delivery. The role involves project management, consultancy, and systems analysis within the optical telecom domain.
18 Hours Ago
Bangalore, Bengaluru Urban, Karnataka, IND
3,470 Employees
Senior level
3,470 Employees
Senior level
Software • Automation
The Staff Software QA Engineer will develop and execute functional test strategies and automated tests for Optical Muxponder/Switchponder/DWDM applications. Responsibilities include verifying Optical Line systems, designing detailed test plans, configuring complex test topologies, and collaborating with product management to ensure quality product delivery.
18 Hours Ago
San Jose, CA, USA
3,470 Employees
Entry level
3,470 Employees
Entry level
Software • Automation
The ASIC Design Engineer at Infinera will be responsible for controlling subsystem development in large mixed signal ASICs, defining control plane specifications, optimizing micro-architecture, and providing layout support for quality product development. The role requires solid ASIC design skills and experience with various protocols and interfaces.
18 Hours Ago
San Jose, CA, USA
3,470 Employees
Senior level
3,470 Employees
Senior level
Software • Automation
The High Speed Circuit & System Architect will engage in architectural design of high-speed analog/mixed-signal circuits and systems, developing algorithms and collaborating with circuit design teams to optimize system performance and ensuring robust design verification.
18 Hours Ago
San Jose, CA, USA
3,470 Employees
Mid level
3,470 Employees
Mid level
Software • Automation
The Mixed-Signal Design Engineer will lead the design of high-speed low-noise clocking circuitry, including fractional-N PLLs and clock distribution networks. Responsibilities include simulation, verification, and optimization of phase noise, jitter performance, and supervising design teams.
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