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Seeking a Senior Memory Design Engineer with 10 years of custom circuit design experience to drive the design and development of SRAM, register file, and custom cells for high performance and low power designs. Responsibilities include working with microarchitecture team, conducting PPA analysis, design equivalence checking, collaborating with CPU and SoC physical design teams, and interacting with technology and CAD teams.

Seeking a Senior Memory Design Engineer to develop custom SRAM memories, Register file memories, and compiled memories. Responsibilities include driving the design and development of custom cells for high performance and low power designs, conducting PPA analysis, equivalence checking, collaborating with various teams, and delivering high-quality design collateral.

Positions are open for full-time in the areas of DFT design from unit level to chip level, involving all aspects of DFT design functions from scan, MBIST, to ATPG. Roles in the areas of CPU and SOC DFT design and verification.