Rivos

Logic Equivalence Check (LEC) Engineer

Reposted 12 Days Ago

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Hsinchu County

Hybrid

Senior level

Software

The Role

Responsible for automating formal verification flow, collaborating with design teams, and improving tools for logical equivalence checks.

Summary Generated by Built In

Join a cutting-edge and well-funded hardware startup in Silicon Valley as a PD/CAD Engineer. Our mission is to reimagine silicon and create computing platforms that will transform the industry with the most advanced technologies. You will have the opportunity to work with some of the most talented and passionate engineers in the world to create designs that push the envelope on performance, energy efficiency and scalability. We offer a fun, creative and flexible work environment, with a shared vision to build products to change the world. You will be responsible for building and automating formal verification flow and also support multiple design teams to consolidate resolutions.

Qualifications

Develop and improve existing flow for logical equivalent check
Experience with ABORT/NEQ debugging process
Experience with logical equivalence tools such as Conformal LEC and/or Formality
Collaborate with tool venders for tool issues debugging and resolving
Collaborate with cross-functional RTL/PD/DFT teams to come up with custom solutions
Developing and maintaining in-house CAD tools and flow
Experience with Conformal ECO/Formality ECO is a plus
Experience with Conformal Lowpower/VCLP is a plus
Experience with Low Power implementation flows (UPF) is a plus
Experience with Physical Synthesis/PNR and also DFT implementation is a plus
Proficient in programming languages, TCL, Python, Perl

Education & Experience