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The role involves performance analysis of high-performance GPUs and SoCs, developing workloads and test suites for various applications, improving turnaround time in product development, and developing infrastructure for performance simulation and analysis. Close collaboration with architecture and design teams is essential.

The ASIC Design Engineer is tasked with developing and enhancing timing analysis/signoff workflows, managing chip level integration, physically partitioning and floor planning, and optimizing designs. This role includes creating custom timing scripts for clock skew analysis and engaging in design optimization tasks to ensure effective design implementation from micro-architecture to tape-out.

Design and implement SoCs, defining micro-architectures and developing RTL while collaborating with verification teams. Responsibilities include owning silicon bring-up, mentoring junior engineers, and ensuring accurate verification and implementation of features.