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Analog Layout Staff Engineer at Marvell responsible for implementing high-speed and precision analog circuits using Cadence Virtuoso. Requires a fundamental understanding of electrical concepts, CAD tools proficiency, and excellent communication skills to collaborate with global teams.

As a SoC Simulation Engineer at Virtual Platforms, create accurate and efficient functional models for simulating System-on-Chip (SoC) designs, collaborate with software teams, diagnose and resolve firmware issues, promote virtual platforms adoption.

Staff Engineer role in Product Engineering at Marvell, focusing on semiconductor solutions for data infrastructure. Responsibilities include interfacing with manufacturers, monitoring tool status, owning test line SPC, and working on failure analysis. Requires 3+ years of experience in product testing or manufacturing related to semiconductor packages and modules, knowledge of optical systems, semiconductor yield and failure analysis, and familiarity with optical test equipment. MS or higher in EE, Physics, or material science preferred.