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The Staff Engineer II will perform hands-on physical design and verification tasks for ASIC development, managing flows and mentoring junior team members. Responsibilities include floor-planning, place and route, timing closure, and physical verification tasks such as DRC and LVS checks.
Develop and deliver Interface and Analog IPs, focusing on Hard Analog or PHY blocks design for internal ASIC or external customers. Support multiple customers and ensure success through robust IP development methodology.
The Senior Staff Engineer I will manage the verification of IPs, Blocks, or Subsystems at the SoC level, develop documentation, analyze/debug verification tasks, and create the verification environment and components.
The Staff/Sr Staff ASIC Engineer will lead static timing analysis and synthesis for complex ASIC designs, collaborate with design teams, optimize performance, resolve equivalence issues, maintain timing constraints, and interface with cross-functional teams. The role requires expertise in RTL design, power optimization, and knowledge of EDA tools.
Alphawave Semi is seeking a Principal Engineer in ASIC Design to contribute to critical data communication technology for various sectors including AI, 5G, and autonomous vehicles. This role involves collaborating with teams to innovate and accelerate technology deployment in data-intense industries.
The Principal Engineer in Analog Design will focus on designing and simulating high-speed circuits, mentoring junior designers, supporting library generation and validation, and conducting post-layout simulations. The role requires a strong background in analog circuit design, particularly in high-speed interfaces and a proven track record in SoC designs.
The Senior Engineer I - VLSI will deliver standards-compliant IP blocks for OTN/Ethernet/CXL/PCIe FPGAs or ASICs, lead projects, refine development processes, architect verification environments using SystemVerilog and UVM, develop test plans and individual test cases, and mentor junior engineers while tracking bug reports and collaborating with customers.
The Sr Product Engineer will develop and execute New Product Introduction plans and qualification, providing customer support, yield enhancement, and cost analysis within the semiconductor industry. They will collaborate with cross-functional teams to bring new products to production and focus on project execution, encompassing multitasking across various processes.
The Sr. DFT Engineer will develop and maintain DFT methodologies across various business units, architect flows for RTL-centric DFT environments, automate verification tests, and lead a team of DFT engineers to achieve company goals.
The Staff Firmware Engineer will develop and test embedded firmware, working on both pre-silicon and post-silicon environments. Responsibilities include developing firmware for embedded Risc-V cores, collaborating with design teams, supporting customers, and mentoring junior team members.
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