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The Engineer (DFT) will be responsible for hands-on work in various DFT aspects including Scan insertion, MBIST, JTAG, ATPG, and Pattern validation at both block and full chip levels using Synopsys, Cadence, and Mentor Graphics tools.

The job involves leading technical efforts in C++ and video streaming technologies. The candidate will work on media products, applying knowledge of audio/video interfaces, encoding/decoding standards, and various multimedia frameworks. Responsibilities include independent work, ownership of tasks, and collaboration with teams using tools like GIT and JIRA.

The job focuses on design verification engineering, involving the assessment and validation of engineering designs. Responsibilities may include product testing, compliance checks, and ensuring designs meet specified requirements and quality standards.

The ERP Functional Analyst II role involves hands-on experience with Manufacturing and SCM modules of Oracle EBS, developing functional design specifications, and maintaining the Oracle Applications production instance. The candidate will work with global teams to address production issues and deliver high-quality solutions for technology implementations.

The Senior PD Engineer will execute ASIC PNR flow tasks including floor-planning, timing closure, and clock tree optimization. Responsibilities also include full chip implementation, working with design teams on timing, and ensuring successful delivery of blocks to customers. Independently solve complex problems and act as a resource for less experienced colleagues.

The Senior Engineer (PD) is responsible for physical design tasks such as floorplanning, power grid analysis, placement, routing, and achieving DRC-LVS and timing closure for various technology nodes including 65nm to 7nm. The role requires expertise in scripting languages and experience with Place and Route tools.

The role involves engineering and testing of embedded systems with a focus on test automation and compiler technology. Responsibilities include developing and executing test plans and procedures for embedded software systems.