Top Senior Level C++ Jobs

Performs software quality assurance activities and provides recommendations to software development groups. Prepares software quality plans and estimates, verifies software builds, baselines, and releases, and participates in reviews of design, code, and test activities.

As a Principal Test Engineer, you will develop test programs and hardware for high-performance semiconductor devices, ensuring quality through ATE testing. You'll work closely with design teams, develop test plans, and may create new testing strategies to meet evolving requirements.

The Sr Staff Enterprise Application Engineer will lead and coordinate PLM discussions, develop enterprise tools, evaluate technology trends, mentor teams, and ensure alignment between enterprise strategies and business goals, alongside hands-on POC development and application design.

The Staff System Software Engineer will develop embedded system software for a next-generation vehicle charging platform, focusing on platform software for the Linux kernel and various communication interfaces. Responsibilities include architecting, designing, implementing, testing systems, and collaborating with hardware and manufacturing teams.

The Sr. Application Software Developer will design and develop database-driven applications for DoD systems, maintain and enhance software code and configurations, troubleshoot issues, and ensure compliance with DOD guidelines while documenting code changes and resolutions.

The Full Stack and Firmware Engineer at Dojo Five will design and develop embedded firmware and full stack applications, ensuring code quality and performance. They will architect distributed systems, mentor peers, and influence technical strategies across the organization, with a focus on agile practices. They should have strong skills in Node, React, embedded systems, and modern development tools, along with a commitment to execution and continuous improvement.

As a DRAM Engineer at Etched, you will optimize memory controllers and PHYs, conduct DRAM simulations, validate SoC memory integration, and oversee HBM silicon testing while developing debugging methodologies and ensuring performance and reliability specifications are met.