Top Hardware Engineer Jobs

Design and develop complex SBC, FPGA, switch, and I/O boards in 3U/6U VPX and custom form factors. Translate system requirements into hardware designs, perform analysis, verification, troubleshooting, support production, document designs, and mentor junior engineers in a schedule-driven DoD embedded systems environment.

Design and implement micro-architecture and RTL for low-power DSPs and hardware accelerators, optimize hardware/software interfaces, model and profile energy/performance trade-offs, collaborate on silicon bring-up and verification, and develop emulation models and test environments.

Responsible for defining qualification strategies for AI compute platforms, ensuring hardware reliability through testing, failure analysis, and collaboration across teams.

The Principal Engineer, Hardware will lead design, integration, and manufacturing of autonomous vehicle systems, ensuring reliability and compliance with safety standards across mechanical and electrical disciplines.

Lead reliability assessments and test campaigns for automotive sensor systems, including lidar, cameras, radar, and IMUs. Own failure analysis, corrective actions, DFMEA sessions, predictive reliability modeling, and risk mitigation across varied climates and road conditions. Collaborate with hardware, systems, safety, software, field operations, and manufacturing teams to improve mass-produced optomechanical assemblies and integrate reliability findings into product and production processes.

Lead advanced hardware diagnostics and RMA lifecycle management for enterprise servers in production data centers. Perform firmware/BMC/BIOS troubleshooting, root cause analysis, vendor warranty coordination, validate replacements, develop diagnostic playbooks, and drive reliability improvements across the fleet.

The Emulation Engineer will oversee SoC bring-up and debugging, develop automated flows for pre-silicon validation, implement hybrid emulation environments, and create chip-to-chip network models, collaborating with various teams.

Designs, tests, and analyzes Starlink gateway antenna electronics and payload hardware. Responsibilities include developing environmental, RF, mechanical, and electrical test solutions; performing failure analysis and root-cause investigations; designing custom PCBAs and test fixtures; conducting bench and environmental testing; supporting qualification, production, and network deployment; and building tools to analyze field and laboratory data. Collaboration spans electrical, mechanical, thermal, software, antenna, supply chain, and silicon engineering teams.

Own hardware emulation models and platform infrastructure for next-generation AI accelerator chips. Build transactors, behavioral and memory models using SystemVerilog and C/C++, ensure RTL and IP are emulation-ready, and automate continuous regression testing. Lead emulation flows, partitioning, performance tuning, vendor relationships, and platform capacity. Support software bring-up, performance verification, functional regression acceleration, and silicon debug while providing technical leadership across design, verification, and software teams.

Design and own RTL hardware blocks for AI accelerator ASICs through microarchitecture, implementation, tapeout, and silicon bring-up. Develop high-performance SystemVerilog designs, meet power, performance, and area targets, and collaborate with verification and physical design teams. Implement assertions and run lint, CDC, LEC, synthesis, and timing flows. Support design reviews, post-silicon debugging, and improvements to ASIC design methodologies, including AI and automation in EDA workflows.

Design and review schematics and PCB layouts for compute, sensor, and interface hardware. Support board bring-up, troubleshooting, validation, reliability testing, and embedded-system integration. Collaborate with software, firmware, mechanical, vendors, and contract manufacturers on prototyping, DFM/DFT, documentation, and production ramp. This entry-level role is intended for candidates graduating by December 2026.

Supports NAVSEA hardware and RF engineering programs involving radar, electronic warfare, EO/IR, laser, and Tactical Data Link systems. Responsibilities include system design, integration, testing, evaluation, technical analysis, documentation, manufacturing support, ship integration, qualification testing, and production acceptance. The role supports program management and requires extensive defense-sector experience, with work primarily at the Washington Navy Yard and occasional travel to naval facilities on the East and West Coasts.

Design, build, and maintain custom hardware and test systems for reverse logistics refurbishment. Create circuit layouts, wire and network control electronics, program embedded controllers, troubleshoot electrical and mechanical issues, and iterate prototypes. Support onsite warehouse operations and travel on project teams as needed.

Lead product assurance and quality activities for hardware and PCB programs: inspections, testing witness, audits, supplier/vendor surveys, develop/implement quality procedures, manage corrective actions, SPC, budgets, and cross-functional team liaison. Mentor staff and support proposals and program quality requirements. Occasional overnight travel required.

Lead planning and execution of reliability testing for wearable hardware. Develop and improve test methods, coordinate with contract manufacturers and labs, perform failure analysis and DFMEA, correlate lab tests with field data, produce test plans and reports, and partner with cross-functional teams to drive corrective actions and reliability improvements.

The Principal Infrastructure Hardware Engineer will design and deliver hardware systems for SiTime products, oversee architecture, manufacturing, and provide technical mentorship across teams.

Design and validate automotive-grade compute hardware from concept to production: create schematics, guide PCB layout, collaborate with firmware/software teams, execute test plans, and engage vendors to ensure performance, reliability, and manufacturability of vehicle compute platforms.

The Hardware Test Engineer provides technical support for hardware diagnostics and troubleshooting, analyzing failures, executing test plans, and documenting results.

Lead board‑level hardware design for consumer network products: define architecture, select components, create schematics, review PCB layouts, perform board bring‑up, debug and validate hardware, support EVT/DVT/PVT and mass production, ensure regulatory compliance, optimize cost/reliability, and mentor junior engineers.

Lead architecture and development of rugged board‑level hardware for high‑speed embedded systems. Design and verify advanced digital circuits (400G+, PCIe Gen5+, DDR5+), mentor engineers, establish hardware standards, support proposals, and drive DFM/DFA/DFT with cross‑functional teams to deliver high‑reliability defense/aerospace solutions.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

The Senior Hardware Integration and Test Engineer will lead hardware integration and testing tasks, develop test plans, manage project risks, and mentor junior engineers within a multidisciplinary team.

Design and develop hardware from concept through production for microcontroller-based systems. Create analog and mixed-signal circuits, power supplies, and manage signal integrity. Use EDA tools for schematic/PCB design, validate prototypes with lab equipment, ensure EMI/EMC compliance (automotive), and collaborate with firmware, mechanical, and test teams to ensure manufacturability and robustness.

Design and execute comprehensive hardware tests, develop manufacturing test setups and automated test systems, analyze results to identify defects, collaborate with engineering to resolve issues, mentor junior engineers, and document procedures to ensure production readiness.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.