Top Hardware Engineer Jobs

Design and integrate hardware systems for residential energy applications, focusing on battery management and inverter systems, while ensuring compliance with industry standards.

The SoC Architect leads the design of SoC architectures to meet PPA targets, collaborates across teams, and resolves technical risks.

Design, develop, and analyze hardware systems and components. Collaborate with teams to create high-end routing platforms from concept to production. Provide technical leadership and mentor junior engineers.

The Staff Hardware Engineer will design, develop, and test electrical hardware for optical modules and AI platforms, collaborate on hardware requirements, and validate components using lab equipment.

The Hardware Engineer I will assist in the hardware design process, collaborate on requirements, and support development of complex hardware systems including schematic capture and PCB layout.

The Digital Hardware Engineer is responsible for designing, developing, and improving embedded control systems, managing schematics and PCBs, and ensuring compliance through collaboration with firmware engineers and manufacturing.

Design and develop hardware from concept through production for microcontroller-based systems. Create analog and mixed-signal circuits, power supplies, and manage signal integrity. Use EDA tools for schematic/PCB design, validate prototypes with lab equipment, ensure EMI/EMC compliance (automotive), and collaborate with firmware, mechanical, and test teams to ensure manufacturability and robustness.

Lead board‑level hardware design for consumer network products: define architecture, select components, create schematics, review PCB layouts, perform board bring‑up, debug and validate hardware, support EVT/DVT/PVT and mass production, ensure regulatory compliance, optimize cost/reliability, and mentor junior engineers.

Support system- and board-level hardware design for consumer networking products from concept through mass production: schematic and PCB work, prototype bring-up and debugging, validation and compliance testing, lab measurements, documentation, and cross-functional collaboration to resolve production and field issues.

Design and execute comprehensive hardware tests, develop manufacturing test setups and automated test systems, analyze results to identify defects, collaborate with engineering to resolve issues, mentor junior engineers, and document procedures to ensure production readiness.

Design, build, and maintain hardware-in-the-loop test benches for effector platforms. Integrate high-fidelity simulation models and hardware components, develop automated test suites and regression frameworks, debug hardware-software interactions, maintain test infrastructure, document procedures, and support transition from HIL validation to integration and flight testing.

Lead architecture and development of rugged board‑level hardware for high‑speed embedded systems. Design and verify advanced digital circuits (400G+, PCIe Gen5+, DDR5+), mentor engineers, establish hardware standards, support proposals, and drive DFM/DFA/DFT with cross‑functional teams to deliver high‑reliability defense/aerospace solutions.

Lead board-level design of ruggedized, high-speed digital hardware from concept through production for defense/aerospace systems. Architect FPGA and CPU-based solutions, ensure signal integrity and manufacturability, establish design standards, support proposals, and collaborate with manufacturing for DFM/DFT.

Design and validate automotive-grade compute hardware from concept to production: create schematics, guide PCB layout, collaborate with firmware/software teams, execute test plans, and engage vendors to ensure performance, reliability, and manufacturability of vehicle compute platforms.

Lead hardware integration for autonomous vehicles: build, test, and maintain fleet hardware; design and install sensors and proof-of-concept systems; perform bring-up, shakedown testing, build test benches, troubleshoot electrical/computer/sensor systems, document procedures, and minimize vehicle downtime while ensuring safety.

Lead hardware test engineering for RF and digital systems: design and implement test methods/equipment, perform electrical/RF troubleshooting, analyze yield/test data, collaborate with design and manufacturing teams, support technicians, and drive corrective actions to meet program yield targets.

Designs, builds, integrates, tests, and maintains communications hardware and rack-based systems in lab and field settings. Prepares drawings, BOMs, cabling specifications, verification procedures, and provides installation, troubleshooting, and sustainment support. Coordinates with stakeholders, presents status updates, and supports system verification and field deployments.

Lead design, implementation, validation, and production of SSD hardware from concept through sustaining. Drive interoperability and system-level tradeoffs (mechanical, thermal, power, SI), diagnose hardware issues with partners and JDMs, lead failure analysis, review test plans, incorporate automation/AI into design and validation, and mentor junior engineers. Primarily on-site in Santa Clara, CA.

Lead on-site technical authority for datacenter hardware reliability and fleet health. Troubleshoot complex hardware failures, drive root cause analysis and corrective actions, coordinate with vendors and cloud providers, establish maintenance standards and runbooks, support new hardware introductions and spare parts strategy, mentor technicians, and analyze failure trends to improve reliability across large-scale GPU and server deployments.

Lead end-to-end hardware system design for high-performance PCB platforms: schematic capture, PCB layout, SI/PI analysis, high-speed SERDES implementation, power system design, system bring-up, debug, compliance testing, and technical support to OEM/ODM partners.

The Senior Hardware Systems Engineer will lead hardware pathfinding for LPU platforms, manage system architecture decisions, and oversee system debugging and program execution while collaborating with multiple teams to deliver production-ready systems.

The Senior Package Layout Engineer will collaborate with teams to design IC substrates, optimize layouts, and improve productivity using Cadence tools.

The role involves physical layout design for mixed-signal circuits, integrating designs with ASIC engineers, and conducting floor planning and verification against design rules.

As an ASIC Design Engineer, you will develop methodologies and RTL for performance monitoring of GPUs and SOCs, working alongside senior engineers and team members.

The Signal & Power Integrity Engineer will develop and optimize signal integrity solutions for complex system designs, including modeling, simulation, and guideline creation for high-speed signaling standards.