Front End Developer Jobs in Santa Clara, CA

The Senior Fullstack/Frontend Engineer will architect and implement scalable frontend systems for AV mapping applications, collaborating with cross-functional teams to enhance user experience and performance in autonomous driving technologies.

Own front-end semiconductor design and verification automation from RTL entry through DFT and implementation handoff. Responsibilities include RTL build, lint, CDC, formal, register generation, simulation, regressions, coverage, emulation, FPGA prototyping, and AI-assisted tooling. The role also manages EDA tool versions, distributed compute, flow health, maintenance, and collaboration with design, verification, DFT, and physical design teams.

Build and maintain reusable, scalable frontend components and design system modules using JavaScript, TypeScript, and modern frameworks. Develop schema-driven, CMS-integrated interfaces; translate designs into responsive, pixel-perfect experiences; and implement automated testing. Optimize performance, accessibility, maintainability, and cross-browser compatibility while collaborating across teams and navigating complex codebases independently.

Design, build, and maintain web interfaces and core services for Clover Gift Cards across POS, web, and consumer portals. Own features end-to-end, write automated tests, troubleshoot production issues, collaborate cross-functionally, and participate in on-call rotation to ensure platform reliability and high availability.

Build and architect responsive frontend interfaces for a quantum security platform. Translate complex network and security data into accessible dashboards, topology visualizations, investigations, reporting workflows, and remediation experiences. Collaborate with product, backend, QA, and solutions teams; optimize performance, maintain design systems, conduct usability testing, establish frontend standards, and mentor engineers.

Verify the front end of high-performance RISC-V CPU cores, including instruction fetch, branch prediction, decode, dispatch, and speculative execution. Develop verification strategies, SystemVerilog/UVM testbenches, constrained-random tests, assertions, and functional coverage. Debug RTL and simulation failures using waveforms and collaborate with CPU architects, RTL designers, and software teams to identify root causes and ensure correctness across workloads and corner cases.

Develops and supports automated FPGA and ASIC design verification flows from RTL through GDSII. Responsibilities include building scripting frameworks, integrating and enhancing EDA tools, applying AI/ML to design automation, automating repetitive workflows, improving design infrastructure, and collaborating with design, verification, CAD/EDA teams, and vendors. The role requires extensive experience with front-end RTL, pre-silicon verification, EDA tools, Unix/Linux, Python, Tcl, and Shell.

Design and deliver complex digital SoCs and advanced automotive communication semiconductors from microarchitecture through RTL, verification, synthesis, lint, CDC, LEC, and timing analysis. Collaborate with architecture, software, hardware, and verification teams to develop high-performance custom silicon meeting power, performance, and area targets. Define ASIC specifications, data flows, algorithms, interfaces, and resource management for networking and intelligent mobility applications.

Designs, integrates, verifies, and qualifies flight RF front-end electronics for spacecraft phased-array antennas and satellite communications. Responsibilities include RF and mixed-signal circuit design, PCB layout, component selection, phased-array calibration, laboratory characterization, environmental qualification, simulation-to-measurement correlation, troubleshooting, documentation, and cross-functional collaboration. The role also mentors engineers and supports repeatable RF design and verification practices.

Verify RISC-V CPU front-end units, including instruction fetch, branch prediction, caches, TLBs, and fetch control structures. Build UVM testbenches, constrained-random and directed stimulus, checkers, transactors, predictors, scoreboards, and C++ reference models. Execute verification plans, track functional and code coverage, and resolve microarchitectural edge cases with RTL, performance modeling, and software teams using simulation and emulation workflows.

Design and develop microarchitecture and RTL for wafer-scale AI chips. Lead functional specification, RTL development, synthesis and front-end integration. Collaborate with physical design, verification, DFT, software and systems teams to meet PPA goals. Debug silicon-level functional, timing, and power issues and manage third-party IP and vendor interactions to deliver production silicon.

Founding front-end engineer to design and build Flick's editor UI (canvas, timeline, node graph, playback). Lead architecture, prototype creative workflows, optimize complex UX interactions, establish code quality and performance practices, collaborate with design/product/AI backend, and drive key technical and product decisions.

The UI Front End Developer will create engaging web interfaces, manage CSS frameworks, and ensure responsive design, leveraging advanced JavaScript skills and libraries.

The Frontend Web Developer will build dynamic websites, requiring strong skills in JavaScript, HTML, CSS and experience with cross-browser compatibility.

Senior front-end/UI developer responsible for building responsive, standards-compliant client-side applications using AngularJS and other MVC/templating frameworks, consuming JSON/REST/SOAP APIs, ensuring performance, accessibility, cross-browser support, unit testing, and working with version control in Agile teams.

Senior front-end developer responsible for building performant, accessible, responsive web UIs using AngularJS and related client-side frameworks, consuming APIs, writing unit tests, and following Agile practices. Collaborate on architecture, ensure cross-browser compatibility, and deliver scalable solutions on Tomcat/UNIX-Linux-Windows platforms.

Architect, design and implement features for RISC-V CPU core generators using Chisel, with responsibilities in verification and performance modeling, collaborating with teams.

Design and implement CPU microarchitecture features and ISA extensions using Chisel; integrate into Chisel/FIRRTL framework; perform sandbox verification and collaborate with verification, physical implementation, and performance teams to meet frequency, area, power, and performance goals. Produce documentation and participate in collaborative design.

As a Software Engineer at Avoma, you will focus on building a responsive web app, developing a collaborative notes editor, and creating interactive dashboard visualizations.

Develop scalable front-end systems for complex web applications, ensuring security and performance while collaborating with teams.

Lead the development of a compiler for AI models, optimizing performance and collaborating across teams while mentoring engineers.

Maintain and enhance the FortiSwitch web GUI by locating and fixing bugs, proposing and implementing new features, writing i18n/a11y-compliant HTML/JS/CSS (TypeScript/SCSS), interfacing with backend C code, drafting functional specs, and improving performance and codebase maintainability.

Lead verification strategy and execution for CPU frontend in high-performance out-of-order cores. Define test plans, checkers, assertions, coverage, and stimulus for branch prediction, instruction fetch, redirects, recovery, and MMU/ITLB interactions. Partner with architects, RTL, performance, and verification teams, apply simulation, formal, and emulation methods, drive block- and core-level signoff, mentor engineers, and build reusable DV infrastructure and methodology.

Own and build complex frontend user experiences for an AI-native cybersecurity platform. Design performant interfaces, visualizations, and dashboards for security analysts, define frontend architecture and standards, collaborate with product/backend/AI teams, and integrate AI to improve investigation and response workflows while ensuring scalability and maintainability.

Lead development of AI-powered enterprise platforms, focusing on full-stack web development, UI/UX design, and data visualization.