Top Design Engineer Jobs in Bangalore

Lead an Analog IC design team in developing integrated circuits for various applications, ensuring project delivery and collaboration across functions. Responsibilities include product ownership from definition to release and interfacing with customers for design support.

As a Senior SOC Design Engineer at NVIDIA, you'll drive SOC assembly, ensure front-end design quality, define methodologies, and address implementation inefficiencies while collaborating across teams.

The CAD Design Engineer will prepare design drawings, support modeling activities, coordinate with project teams, and assist in quantity take-offs and design documentation.

The Staff Design Verification Engineer leads verification strategy for complex analog and mixed-signal designs, developing environments and mentoring engineers while ensuring product quality.

The role involves designing and verifying high-speed analog and mixed-signal circuits for photonic transceivers. Responsibilities include developing testbenches, executing test cases, and collaborating with multidisciplinary teams.

The role involves executing RTL-to-GDSII flows, performing timing analysis, and verifying designs while collaborating with cross-functional teams on complex designs.

Design and own RTL development for an AI-enabled RISC-V CPU core, including microarchitecture, vector/matrix engines, performance/power/area optimization, and verification support. Collaborate with cross-functional teams for timing, reliability, testability, and SoC integration.

The role involves designing and architecting high-performance networking ASICs, performing micro-architecture, and collaborating with verification and physical design teams.

Design and simulate transistor-level analog and mixed-signal IC blocks, create behavioral models, supervise physical layout, verify chip performance, support tape-out and silicon debug, collaborate with test/validation/packaging teams, and contribute to product definition and IP protection.

Design and implement SoC units by defining micro-architecture, developing RTL, collaborating with verification and physical design teams, owning silicon bring-up, and mentoring junior engineers.

The Analog IC Design Engineer will focus on the design phases of RF transceivers including architecture, schematic design, layout, and validation, engaging with various RF blocks and calibration modules.

The Analog Design Engineer will design, develop, and optimize analog circuits. Responsibilities include simulation, verification, test plan execution, and cross-functional collaboration to ensure high-quality, performance-optimized designs.

Design and develop ASIC IP blocks and subsystems for 5G/6G, perform RTL sign-off and documentation, collaborate with architects and verification engineers, optimize design methodologies, and contribute across teams to deliver projects.

Define and lead system-level modeling and virtual prototyping for ADI SoCs; create high-fidelity SystemC/TLM virtual platforms; develop AI tools and automation for modeling; troubleshoot pre-silicon system issues; and collaborate with customers and cross-functional teams to enable early software development prior to silicon tape-out.

Responsible for designing and modifying equipment specifications, coordinating with teams, and managing Bill of Materials while ensuring compliance and optimization in projects.

Design and develop high-speed Ethernet switching hardware from spec through production: component selection, schematic capture, PCB stackup and layout collaboration, signal and power integrity analysis, prototype lab bring-up, system debug, and manufacturing handoff.

Design and verify mixed-signal CMOS transceiver/SerDes IP (PLL, DLL, ADC, regulators, amplifiers, TX/RX, CDR). Perform architectural work, circuit implementation and SPICE/Spectre/MATLAB verification. Lead lab chip bring-up, debugging, pre-tapeout validation, generate design documentation, and coordinate with digital/SoC teams, test engineers, customers and FAEs.

Design and implement RTL for IPs, develop microarchitecture and specs, optimize for PPA, perform RTL coding/debug/simulation, collaborate on verification and physical design, support SoC integration and post‑silicon validation.

The role involves IC layout design for high-performance memory circuits, leading layout architecture, verification, and mentoring junior engineers while optimizing design methodologies.

The Lead Design Engineer will perform design verification of ASICs, create test plans, develop functional coverage, and involve in post-silicon validation in a collaborative environment.

Seeking a Sr Principal Design Engineer with 12-14 years in VLSI, expertise in Verilog, HVL, UVM/OVM methodologies, and scripting skills.

The Principal Design Engineer will oversee semiconductor IP development, ensuring quality management, continuous process improvement, and maintaining design quality certifications.

Looking for a Sr Principal Design Engineer with 12-14 years of experience in VLSI, strong skills in Verilog and various methodologies, and expertise in test-bench development and project management.

The Lead Physical Design Engineer will manage and execute physical design tasks for high-performance semiconductor ICs, ensuring design integration and resolving issues related to power efficiency, timing, and area.

As an SoC Logic Design Engineer, you'll develop RTL designs, integrate IP blocks into SoCs, ensure design integrity, and support customers.