Top Design Engineer Jobs in Bangalore

Provide customer-facing technical leadership for Ethernet FPGA IP: lead design bring-up and validation across 10G–800G, debug and optimize performance, validate protocol compliance (AN/LT, IEEE1588 PTP), produce reference designs and documentation, and collaborate with design, validation, product engineering, and sales to resolve issues and improve IP quality.

Lead pre-silicon verification for complex SoC designs, define verification strategies, and collaborate cross-functionally to ensure system correctness and quality.

The Staff Design Verification Engineer will lead verification strategies for complex designs, mentor junior engineers, and resolve verification challenges while representing the company to customers and partners.

The Principal Digital Design Engineer defines technical strategy for digital design, leads complex SoC architecture development, drives innovation in methodologies, mentors talent, and represents the company as a technical authority.

Design optimized digital blocks, develop TCL scripts, ensure compliance with specifications, support DFT strategy, conduct verification planning, and produce documentation.

Define and lead verification strategy and plans, develop SystemVerilog/UVM environments for blocks and SoCs, coordinate verification activities, debug RTL functional issues, and improve verification methodology.

Lead verification strategy and plans for mixed-signal IP and SoC blocks. Develop SystemVerilog/UVM environments, coordinate verification activities, debug RTL functional issues, collect coverage, manage regressions, and improve verification methodology.

Lead verification strategy and plans for blocks and SoCs; develop SystemVerilog/UVM environments; coordinate and lead verification activities; debug RTL functional issues; improve verification methodology and manage coverage and regressions.

Lead and define verification strategies and plans for digital/SoC blocks, develop SystemVerilog/UVM environments, debug RTL functional issues, coordinate verification activities, and improve verification methodology.

Develop and execute functional verification plans and testbenches for FPGA designs using SystemVerilog and UVM/OVM. Create verification environments, run simulations (including gate-level and power/timing-aware), root-cause and debug pre-silicon issues, collaborate with architects and RTL/physical design teams, and document verification strategy and results.

Lead SoC execution from specification to silicon: define SoC architecture and product strategy, select IP and foundry nodes, drive PPA optimization, govern silicon sign-off, and coordinate cross-functional teams (design, verification, DFT, PD, power, SiVal) to deliver first-time-right silicon.

Lead product engineer responsible for product development, verification expertise in memory protocols, driving product adoption, and collaborating across teams to meet customer needs.

Develop and execute verification plans and UVM-based testbenches to validate RISC-V CPU microarchitecture. Perform functional coverage analysis, system-level simulations, debugging, automation with scripting, and collaborate with architects and RTL designers to close verification gaps and improve verification infrastructure.

The Senior Engineer Design will manage engineering activities, including product design and continuous improvements, ensuring quality and on-time delivery while mentoring junior engineers.

Design and develop integrated circuits and ASICs, owning architecture, logic design, verification, and system simulation. Drive synthesis, place-and-route, timing and power analysis, and complex IC layout. Evaluate process flows and equipment, run experiments, review vendor capability, lead major projects, mentor junior engineers, and deliver new products/processes.

Design and develop integrated circuits and oversee ASIC development from architecture and logic design through system simulation, synthesis, place-and-route, timing and power analysis. Define module interfaces and layouts, evaluate process flow and equipment, run experiments, assess vendor capabilities, lead major projects, mentor junior engineers, and drive delivery of new products and processes.

Lead design and development of complex integrated circuits and ASICs, defining architecture, logic, simulation, synthesis, place-and-route, timing and power analysis. Oversee verification, documentation, experimental evaluation, vendor capability reviews, and mentor junior engineers while managing major projects from concept through delivery.