Top System Engineer Jobs in Bangalore

Performs structural design and analysis of aircraft components, assemblies, and systems using hand calculations and finite element methods. Conducts static, fatigue, damage-tolerance, load, and vibration analyses for metallic and composite structures. Develops certification documentation, supports gated reviews, evaluates structural integrity, and ensures compliance with FAA and military standards. Collaborates with global cross-functional teams, communicates technical results, and mentors engineers.

Designs and enhances systems software, develops and executes comprehensive test plans, debugs integration issues, and leads software systems engineering projects. The role collaborates with internal and external development partners, communicates project status and resolutions, and mentors less-experienced engineers. Work focuses on HPE’s hybrid cloud and GreenLake platform and is primarily onsite at an HPE office.

Designs and enhances systems software, develops and executes test plans, automates testing, debugs code and integration issues, and contributes to software architecture. Leads software systems engineering projects, collaborates with internal and outsourced development teams, communicates project progress, and mentors less-experienced engineers. The role focuses on reliable, high-quality hybrid cloud platform software and requires onsite work from an HPE office.

Supports large-scale production applications, systems, databases, and technical services. Troubleshoots complex issues, analyzes performance trends and technical queries, recommends process improvements, and provides internal consulting to stakeholders. The role requires systems administration, application support, monitoring, deployment, incident and change management, scripting, database administration, scheduling, DevOps tooling, certificate management, and familiarity with Windows or Linux environments.

Leads end-to-end hardware development for next-generation routing and switching platforms, from architecture and PCB design through production. Responsibilities include schematic, BOM, placement, routing, Gerber release, bring-up, debugging, validation, fault analysis, compliance testing, and product sustaining. The role leads technical deliverables, collaborates with cross-functional teams and suppliers, designs with CPLDs and FPGAs, and addresses high-speed CPU, memory, and networking interfaces while considering signal integrity, thermal, power, mechanical, manufacturing, and cost requirements.

Lead end-to-end verification of Ericsson 5G NR RAN systems, analyzing performance, capacity, scalability, and quality under high-load scenarios. Troubleshoot cross-layer issues across PHY, MAC, RLC, PDCP, and IP using logs, traces, and KPIs. Define verification methodologies, improve automation and CI/CD coverage, mentor engineers, support customer trials, reproduce field issues, and influence product and release decisions through data-driven technical insights.

Perform end-to-end system verification of Ericsson 5G RAN solutions, including capacity, performance, scalability, mobility, and high-load traffic testing. Analyze logs, traces, KPIs, and protocol-layer behavior; troubleshoot PHY/MAC/RLC/PDCP/IP issues and identify root causes. Support feature integration, test automation, verification frameworks, and CI/CD improvements. Collaborate with development, integration, CI, and product teams while applying modern and AI-assisted verification methods.

Designs and systemizes 5G and 6G features across scheduling, physical layer, radio resource management, beamforming, massive MIMO, carrier aggregation, and spectrum sharing. Develops link- and network-level simulations, analyzes performance and verification results against operator KPIs, improves products and tools, and supports customer deployment and troubleshooting. Requires deep communications theory, DSP, LTE/NR 3GPP knowledge, and extensive telecom software development experience.

Verify Ericsson 5G NR RAN solutions through end-to-end system, capacity, performance, and high-load traffic testing. Troubleshoot issues across protocol layers using logs, traces, and KPIs; analyze requirements; improve test coverage, automation, verification frameworks, and CI/CD pipelines. The role requires configuring and deploying LTE/5G equipment, analyzing PHY/MAC performance, and collaborating with development, integration, and product management teams.

Design and systemize 5G L1/L2 features (PHY, RRM), specify requirements and tests, develop link/network simulations, validate performance, support verification and customer deployments.

Design, implement, debug, and optimize kernel-mode GPU and platform power-management software. Develop DVFS, power-state, residency, thermal, and performance features; bring up and harden kernel and firmware components across SoCs, PMUs, regulators, and operating systems. Support emulation, silicon validation, product hardening, and global collaboration across hardware, firmware, OS, and platform teams for next-generation NVIDIA processors.

Own end-to-end design verification for IOMMU and system IP, including specification review, test planning, constrained-random verification, coverage analysis, regression debugging, and sign-off. Build scalable SystemVerilog/UVM environments, verify standard bus protocols, automate workflows with scripting, and collaborate with architecture, RTL, and validation teams. The role is hybrid in Bangalore and involves CPU and memory-management IP for AI/ML systems.

Provides technical leadership for Wabtec’s train-handling systems, including architecture, requirements, design, integration, verification, validation, deployment, and sustainment. Leads complex system decisions, technical reviews, customer deployments, field testing, issue resolution, and technology roadmaps. Partners across engineering, product, safety, and customer organizations while advancing AI-enabled engineering, automation, analytics, and autonomous train capabilities. Establishes standards, mentors engineers, and ensures solutions meet performance, safety, regulatory, and business requirements.

Drives power, performance, and performance-per-watt analysis for SoC and Windows on ARM systems. Builds automated power measurement infrastructure, analyzes telemetry and firmware traces, optimizes low-power states and battery-life scenarios, and collaborates with hardware, firmware, OS, and driver teams from pre-silicon modeling through post-silicon validation. Develops visualizations and reports to identify regressions and recommend system optimizations.

Drive end-to-end performance characterization and optimization of Ethernet hardware and software systems. Analyze throughput, packet rate, latency, jitter, buffer utilization, CPU and memory efficiency, and identify bottlenecks across hardware, firmware, drivers, and software. Develop validation strategies and optimization methods for varied traffic workloads. Evaluate MAC, PHY, switch, NIC, DMA, memory, cache, and acceleration performance across pre-silicon and post-silicon platforms.

Drive architecture, integration, bring-up, validation, optimization, and deployment of networking infrastructure for Microsoft MAIA AI systems. Lead qualification of switches, NICs, PHYs, optics, cables, SerDes, and interconnect technologies. Develop performance, reliability, telemetry, diagnostics, and automation strategies for distributed AI workloads across hyperscale datacenters. Collaborate with silicon, firmware, software, hardware, Azure, ODM, and manufacturing teams to deliver scalable AI networking platforms.

Design and execute system-level test strategies and automated test suites for cloud-native observability applications. Build CI/CD-integrated automation frameworks, validate distributed systems, microservices, APIs, Kubernetes deployments, data ingestion, streaming, performance, reliability, and operational readiness. Investigate defects, conduct root cause and escaped defect analysis, and collaborate across development, product, and operations teams to improve quality engineering practices. Apply AI-powered testing and intelligent automation in agile environments.

Optimize cross-stack software and hardware interactions across Intel platforms for cloud, enterprise, AI, HPC, and edge workloads. Analyze system performance, power, responsiveness, security, and efficiency through benchmarking and profiling. Develop system-level KPIs and measurement methodologies, collaborate with customers and partners on software stacks and roadmaps, and provide technical guidance influencing platform and technology strategy.

Design, develop, and test system and embedded software for WLAN controller infrastructure across on-prem and cloud platforms. Perform feasibility studies, debug complex issues, contribute to architecture reviews, mentor engineers, and drive CI/CD-based delivery for virtualized networking solutions.

The Power System Engineer analyzes and models electrical power systems, ensuring compliance with grid codes, and supports technical studies during project execution.

Designs and develops embedded firmware for residential gateways using C/C++, Embedded Linux, and prplOS. Owns wireless architecture for Wi-Fi 6E and Wi-Fi 7, integrates drivers and networking stacks, and optimizes system performance with perf and Valgrind. Builds Python-based automation and unit-testing frameworks, manages IPC services, TR-181 and USP device management, Docker-based microservices, SoC abstraction layers, and Git-based release pipelines.

Design and develop functional safety software for GPU, DLA, and Tegra compute engines. Define company-wide formal verification processes, analyze software architecture, and improve software quality. Mentor engineers and support initiatives involving formal methods, functional programming, parallel computing, deep learning frameworks, and safety-critical software development.

Designs and develops user-mode drivers and functional safety software for NVIDIA GPUs, DLAs, and Tegra compute engines. Responsibilities include architecture, software analysis, safety certification, standards development, collaboration with hardware and architecture teams, and mentoring engineers. The role focuses on hardening complex software for critical automotive applications and supporting parallel computation across next-generation GPUs and deep learning accelerators.

Develop system software, tools, and infrastructure for validating and productizing next-generation GPUs and high-performance computing processors. Collaborate with architecture, hardware, and driver teams; assess hardware features; architect manufacturing diagnostics; and deliver robust solutions using operating systems, algorithms, and computer architecture expertise. The role requires strong C/C++ programming, hardware-level debugging, and experience working with large system software codebases.

Build and maintain internal applications, integrations, automations, data workflows, and AI-powered tools for business teams. Translate loosely defined problems into reliable technical solutions, choose between custom development and existing tools, and own solutions through rollout and maintenance. The role requires AI-native development using coding agents, programming languages, databases, Git, LLM APIs, and agent frameworks.